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WF128K32-XXX5 데이터시트 PDF




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부품번호 WF128K32-XXX5 기능
기능 FLASH MODULE
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WF128K32-XXX5 데이터시트, 핀배열, 회로
www.DataSheet4U.com
White Electronic Designs
WF128K32-XXX5
128KX32 5V FLASH MODULE, SMD 5962-94716
FEATURES
Access Times of 50**, 60, 70, 90, 120, 150ns
Packaging:
• 66 pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
• 68 lead, Hermetic CQFP (G2U), 22.4mm
(0.880 inch) square, 3.56mm (0.140 inch) high
(Package 510)
• 68 lead, Hermetic CQFP (G2L), 22.4mm
(0.880 inch) square, 4.06mm (0.160 inch) high
(Package 528)
Sector Architecture
• 8 equal size sectors of 16KBytes each
• Any combination of sectors can be concurrently
erased. Also supports full chip erase
Commercial, Industrial and Military Temperature
Ranges
5 Volt Programming. 5V ± 10% Supply
Low Power CMOS, 1mA Standby Typical
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Page Program Operation and Internal Program
Control Time
Weight
WF128K32-XG2LX5 - 8 grams typical
WF128K32-XG2UX5 - 8 grams typical
WF128K32-XH1X5 - 13 grams typical
100,000 Erase/Program Cycles Typical, 0°C to
+70°C
Note: For programming information refer to Flash Programming 1M5 Application Note.
Organized as 128Kx32
* This product is subject to change without notice.
* * The access time of 50ns is available in Industrial and Commercial temperature
ranges only.
FIGURE 1 – PIN CONFIGURATION FOR WF128K32N-XH1X5
Top View
I/O8 WE2# I/O15
I/O9
CS2#
I/O14
I/O10 GND I/O13
A14 I/O11 I/O12
A16 A10
OE#
A11 A9
NC
A0 A15 WE1#
NC VCC
I/O7
I/O0 CS1# I/O6
I/O1 NC
I/O5
I/O2 I/O3
I/O4
I/O24
VCC
I/O25 CS4#
I/O26 WE4#
A7 I/O27
A12 A4
NC A5
A13 A6
A8 WE3#
I/O16 CS3#
I/O17 GND
I/O18
I/O19
I/O31
I/O30
I/O29
I/O28
A1
A2
A3
I/O23
I/O22
I/O21
I/O20
Pin Description
I/O0-31
A0-16
WE1-4#
CS1-4#
OE#
VCC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Block Diagram
OE#
A0-16
WE1# CS1#
WE2# CS2#
WE3# CS3#
128K x 8
128K x 8
128K x 8
WE4# CS4#
128K x 8
8
I/O0-7
8
I/O8-15
8
I/O16-23
8
I/O24-31
March 2006
Rev. 8
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com




WF128K32-XXX5 pdf, 반도체, 판매, 대치품
White Electronic Designs
WF128K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, CS# CONTROLLED
VCC = 5.0V, VSS = 0V, -55°C TA +125°C
Parameter
Symbol
-50 -60 -70 -90 -120 -150 Unit
Min Max Min Max Min Max Min Max Min Max Min Max
Write Cycle Time
WE# Setup Time
CS# Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
WE# Hold from WE# High
CS# Pulse Width High
Duration of Programming Operation
Duration of Erase Operation
Read Recovery before Write
Chip Programming Time
tAVAV tWC 50 60 70 90 120 150 ns
tWLEL tWS
0
0
0
0
0
0 ns
tELEH tCP 25 30 35 45 50 50 ns
tAVEL tAS
0
0
0
0
0
0 ns
tDVEH tDS 25 30 30 45 50 50 ns
tEHDX tDH
0
0
0
0
0
0 ns
tELAX tAH 40 45 45 45 50 50 ns
tEHWH tWH
0
0
0
0
0
0 ns
tEHEL tCPH 20 20 20 20 20 20 ns
tWHWH1
14
14
14
14
14
14
µs
tWHWH2
2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 sec
tGHEL
0
0
0
0
0
0 ns
12.5 12.5 12.5 12.5 12.5 12.5 sec
March 2006
Rev. 8
FIGURE 4 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Typ
Input Pulse Levels
Input Rise and Fall
VIL = 0, VIH = 3.0
5
Input and Output Reference Level
1.5
Output Timing Reference Level
1.5
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 .
VZ is typically the midpoint of VOH and VOL.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
Unit
V
ns
V
V
4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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WF128K32-XXX5 전자부품, 판매, 대치품
White Electronic Designs
WF128K32-XXX5
FIGURE 6 WRITE/ERASE/PROGRAM OPERATION, WE# CONTROLLED
Addresses
CS#
OE#
WE#
Data
5.0 V
5555H
tWC
PA
tAS tAH
tGHWL
tWP
tCS tWPH
tDH
AOH
PD
tDS
Data# Polling
PA
tWHWH1
D7# DOUT
tRC
tOE
tCE
tDF
tOH
NOTES:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7# is the output of the complement of the data written to the device (for each chip).
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
March 2006
Rev. 8
7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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WF128K32-XXX5

FLASH MODULE

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