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PDF AT24C512B Data sheet ( Hoja de datos )
| Número de pieza | AT24C512B | |
| Descripción | Two-wire Serial EEPROM 512K | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Low-voltage and Standard-voltage Operation
– 1.8v (VCC = 1.8V to 3.6V)
– 2.5v (VCC = 2.5V to 5.5V)
• Internally Organized 65,536 x 8
• Two-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz (2.5V, 5.5V), 400 kHz (1.8V) Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 128-byte Page Write Mode (Partial Page Writes Allowed)
• Self-timed Write Cycle (5 ms Max)
• High Reliability
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
• Lead-free/Halogen-free Devices
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-ball dBGA2, and
8-lead Ultra Thin Small Array (SAP) Packages
• Die Sales: Wafer Form, Waffle Pack and Bumped Die
Two-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512B
with Three Device Address Inputs
Description
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The
device’s cascadable feature allows up to eight devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available
in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,
8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is
available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.
Not Recommended
for New Design.
Replaced by
AT24C512C.
Table 0-1.
Pin Name
A0–A2
SDA
SCL
WP
Pin Configurations
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
8-lead TSSOP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-lead PDIP
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
8-ball dBGA2
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead Ultra Thin SAP
VCC 8
WP 7
SCL 6
SDA 5
1 A0
2 A1
3 A2
4 GND
Bottom View
8-lead SOIC
A0
A1
A2
GND
1
2
3
4
8 VCC
7 WP
6 SCL
5 SDA
Rev. 5297A–SEEPR–1/08
1 page  
AT24C512B
Table 2-3. AC Characteristics (Industrial Temperature)
Applicable over recommended operating range from TAI = 40C to +85C, VCC = +1.8V to +5.5V, CL = 100 pF (unless oth-
erwise noted). Test conditions are listed in Note 2.
1.8-volt
2.5, 5.0-volt
Symbol
Parameter
Min Max Min Max Units
fSCL
tLOW
tHIGH
ti
tAA
tBUF
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
Time the bus must be free before
a new transmission can start(1)
1.3
0.6
0.05
1.3
400
1000
kHz
0.4 µs
0.4 µs
100 50 ns
0.9
0.05 0.55
µs
0.5 µs
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Endurance(1)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
25°C, Page Mode, 3.3V
0.6
0.6
0
100
0.6
50
Notes:
1. This parameter is ensured by characterization only.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.8V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50 ns
Input and output timing reference voltages: 0.5 VCC
0.3
300
5
1,000,000
0.25
0.25
0
100
0.25
50
µs
µs
µs
ns
0.3 µs
100 ns
µs
ns
5 ms
Write
Cycles
5297A–SEEPR–1/08
5
5 Page 
Figure 6-3. Page Write
Figure 6-4. Current Address Read
Figure 6-5. Random Read
Figure 6-6. Sequential Read
5297A–SEEPR–1/08
AT24C512B
11
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet AT24C512B.PDF ] | |
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