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AT49BV6416CT 데이터시트 PDF




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AT49BV6416CT 데이터시트, 핀배열, 회로
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Features
64-megabit (4M x 16) Flash Memory
2.7V - 3.6V Read/Write
High Performance
– Asynchronous Access Time – 70 ns
– Page Mode Read Time – 20 ns
Sector Erase Architecture
– Eight 4K Word Sectors with Individual Write Lockout
– One Hundred Twenty-seven 32K Word Main Sectors with Individual Write Lockout
Typical Sector Erase Time: 32K Word Sectors – 700 ms; 4K Word Sectors – 200 ms
Four Plane Organization, Permitting Concurrent Read in Any of the Three Planes not
Being Programmed/Erased
– Memory Plane A: 16M Memory Including Eight 4K Word Sectors
– Memory Plane B: 16M Memory Consisting of 32K Word Sectors
– Memory Plane C: 16M Memory Consisting of 32K Word Sectors
– Memory Plane D: 16M Memory Consisting of 32K Word Sectors
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
– 30 mA Active
– 35 µA Standby
2.2V I/O Option Reduces Overall System Power
VPP Pin for Write Protection and Accelerated Program/Erase Operations
Reset Input for Device Initialization
CBGA Package
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Common Flash Interface (CFI)
64-megabit
(4M x 16)
Page Mode
2.7-volt Flash
Memory
AT49BV6416C
AT49BV6416CT
1. Description
The AT49BV6416C(T) is a 2.7-volt 64-megabit Flash memory. The memory is divided
into multiple sectors and planes for erase operations. The device can be read or
reprogrammed off a single 2.7V power supply, making it ideally suited for In-System
programming. The device can operate in the asynchronous or page read mode.
The AT49BV6416C(T) is divided into four memory planes. A read operation can occur
in any of the three planes which is not being programmed or erased. This concurrent
operation allows improved system performance by not requiring the system to wait for
a program or erase operation to complete before a read is performed. To further
increase the flexibility of the device, it contains an Erase Suspend and Program Sus-
pend feature. This feature will put the erase or program on hold for any amount of time
and let the user read data from or program data to any of the remaining sectors. There
is no reason to suspend the erase or program operation if the data to be read is in
another memory plane.
The VPP pin provides data protection and faster programming times. When the VPP
input is below 0.7V, the program and erase functions are inhibited. When VPP is at
1.65V or above, normal program and erase operations can be performed. With VPP at
10.0V, the program (Dual-word Program command) operation is accelerated.
3465C–FLASH–07/05




AT49BV6416CT pdf, 반도체, 판매, 대치품
3.5.3
Sector Erase
The device is organized into multiple sectors that can be individually erased. The Sector Erase
command is a two-bus cycle operation. The sector whose address is valid at the second rising
edge of WE will be erased provided the given sector has not been protected.
3.6 Word Programming
The device is programmed on a word-by-word basis. Programming is accomplished via the
internal device command register and is a two-bus cycle operation. The programming address
and data are latched in the second cycle. The device will automatically generate the required
internal programming pulses. Please note that a “0” cannot be programmed back to a “1”; only
erase operations can convert “0”s to “1”s.
3.7 Flexible Sector Protection
The AT49BV6416C(T) offers two sector protection modes, the Softlock and the Hardlock. The
Softlock mode is optimized as sector protection for sectors whose content changes frequently.
The Hardlock protection mode is recommended for sectors whose content changes infrequently.
Once either of these two modes is enabled, the contents of the selected sector is read-only and
cannot be erased or programmed. Each sector can be independently programmed for either the
Softlock or Hardlock sector protection mode. At power-up and reset, all sectors have their Soft-
lock protection mode enabled.
3.7.1
Softlock And Unlock
The Softlock protection mode can be disabled by issuing a two-bus cycle Unlock command to
the selected sector. Once a sector is unlocked, its contents can be erased or programmed. To
enable the Softlock protection mode, a two-bus cycle Softlock command must be issued to the
selected sector.
3.7.2
Hardlock And Write Protect (WP)
The Hardlock sector protection mode operates in conjunction with the Write Protection (WP) pin.
The Hardlock sector protection mode can be enabled by issuing a two-bus cycle Hardlock soft-
ware command to the selected sector. The state of the Write Protect pin affects whether the
Hardlock protection mode can be overridden.
• When the WP pin is low and the Hardlock protection mode is enabled, the sector cannot be
unlocked and the contents of the sector is read-only.
• When the WP pin is high, the Hardlock protection mode is overridden and the sector can be
unlocked via the Unlock command.
To disable the Hardlock sector protection mode, the chip must be either reset or power cycled.
4 AT49BV6416C(T)
3465C–FLASH–07/05

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AT49BV6416CT 전자부품, 판매, 대치품
AT49BV6416C(T)
Table 3-3. Status Register Bit Definition
WSMS
ESS
ES
PRS
VPPS
PSS
SLS
PLS
76543210
Notes
SR7 WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
Check Write State Machine bit first to determine Word Program
or Sector Erase completion, before checking program or erase
status bits.
SR6 = ERASE SUSPEND STATUS (ESS)
1 = Erase Suspended
0 = Erase In Progress/Completed
When Erase Suspend is issued, WSM halts execution and sets
both WSMS and ESS bits to “1” – ESS bit remains set to “1” until
an Erase Resume command is issued.
SR5 = ERASE STATUS (ES)
1 = Error in Sector Erase
0 = Successful Sector Erase
When this bit is set to “1”, WSM has applied the max number of
erase pulses to the sector and is still unable to verify successful
sector erasure.
SR4 = PROGRAM STATUS (PRS)
1 = Error in Programming
0 = Successful Programming
When this bit is set to “1”, WSM has attempted but failed to
program a word
SR3 = VPP STATUS (VPPS)
1 = VPP Low Detect, Operation Abort
0 = VPP OK
The VPP status bit does not provide continuous indication of VPP
level. The WSM interrogates VPP level only after the Program or
Erase command sequences have been entered and informs the
system if VPP has not been switched on. The VPP is also checked
before the operation is verified by the WSM.
SR2 = PROGRAM SUSPEND STATUS (PSS)
1 = Program Suspended
0 = Program in Progress/Completed
When Program Suspend is issued, WSM halts execution and
sets both WSMS and PSS bits to “1”. PSS bit remains set to “1”
until a Program Resume command is issued.
SR1 = SECTOR LOCK STATUS
1 = Prog/Erase attempted on a locked sector; Operation aborted.
0 = No operation to locked sectors
If a Program or Erase operation is attempted to one of the locked
sectors, this bit is set by the WSM. The operation specified is
aborted and the device is returned to read status mode.
SR0 = Plane Status (PLS)
Indicates program or erase status of the addressed plane.
Note: 1. A Command Sequence Error is indicated when SR1, SR3, SR4 and SR5 are set.
Table 3-4.
WSMS
(SR7)
0
0
1
Status Register Device WSMS and Write Status Definition
PLS
(SR0)
Description
0 The addressed plane is performing a program/erase operation.
1 A plane other than the one currently addressed is performing a program/erase operation.
x
No program/erase operation is in progress in any plane. Erase and Program suspend bits (SR6, SR2)
indicate whether other planes are suspended.
3465C–FLASH–07/05
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AT49BV6416C

Flash Memory

ATMEL Corporation
ATMEL Corporation
AT49BV6416CT

Flash Memory

ATMEL Corporation
ATMEL Corporation

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