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PDF ATA5429 Data sheet ( Hoja de datos )
| Número de pieza | ATA5429 | |
| Descripción | (ATA5423 - ATA5429) UHF ASK/FSK Transceiver | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Multi Channel Half–duplex Transceiver with Approximately ±2.5 MHz Programmable
Tuning Range
• High FSK Sensitivity: –106 dBm at 20 kBaud/–109.5 dBm at 2.4 kBaud (433.92 MHz)
• High ASK Sensitivity: –112.5 dBm at 10 kBaud/–116.5 dBm at 2.4 kBaud (433.92 MHz)
• Low Supply Current: 10.5 mA in RX and TX Mode (3 V/TX with 5 dBm)
• Data Rate: 1 to 20 kBaud Manchester FSK, 1 to 10 kBaud Manchester ASK
• ASK/FSK Receiver Uses a Low–IF Architecture with High Selectivity, Blocking, and
Low Intermodulation (Typical Blocking 55 dB at ±750 kHz/61 dB at ±1.5 MHz and
70 dB at ±10 MHz, System I1dBCP = –30 dBm/System IIP3 = –20 dBm)
• 226 kHz IF Frequency with 30 dB Image Rejection and 170 kHz Usable IF Bandwidth
(TBD)
• Transmitter Uses Closed Loop Fractional–N Synthesizer for FSK Modulation with a
High PLL Bandwidth and an Excellent Isolation between PLL/VCO and PA
• Tolerances of XTAL Compensated by Fractional–N Synthesizer with 800 Hz RF
Resolution
• Integrated RX/TX–Switch, Single–ended RF Input and Output
• RSSI (Received Signal Strength Indicator)
• Communication to Microcontroller with SPI Interface Working at Maximum 500 kBit/s
• Configurable Self Polling and RX/TX Protocol Handling with FIFO–RAM Buffering of
Received and Transmitted Data
• 5 Push Button Inputs and One Wake–up Input are Active in Power–down Mode
• Integrated XTAL Capacitors
• PA Efficiency: up to 38% (433.92 MHz/10 dBm/3 V)
• Low In–band Sensitivity Change of Typically ±1.8 dB within ±58 kHz Center Frequency
Change in the Complete Temperature and Supply Voltage Range (TBD)
• Supply Voltage Switch, Supply Voltage Regulator, Reset Generation, Clock/Interrupt
Generation and Low Battery Indicator for Microcontroller
• Fully Integrated PLL with Low Phase Noise VCO, PLL Loop Filter and Full Support of
Multi–channel Operation with Arbitrary Channel Distance Due to Fractional–N
Synthesizer
• Sophisticated Threshold Control and Quasi–peak Detector Circuit in the Data Slicer
• Power Management via Different Operation Modes
• 315 MHz, 345 MHz, 433.92 MHz, 868.3 MHz and 915 MHz without External VCO and PLL
Components
• Inductive Supply with Voltage Regulator if Battery is Empty (AUX Mode)
• Efficient XTO Start–up Circuit (> –1.5 kΩ Worst Case Real Start–up Impedance)
• Changing of Modulation Type ASK/FSK and Data Rate without Component Changes
• Minimal External Circuitry Requirements for Complete System Solution
• Adjustable Output Power: 0 to 10 dBm Adjusted and Stabilized with External Resistor
• ESD Protection at all Pins (2 kV HBM, 200 V MM, TBD FCDM)
• Supply Voltage Range: 2.4 V to 3.6 V or 4.4 V to 6.6 V
• Temperature Range: –40°C to +85°C
• Small 7 × 7 mm QFN48 Package
UHF ASK/FSK
Transceiver
ATA5423
ATA5425
ATA5428
ATA5429
Preliminary
Rev. 4841A–RKE–02/05
1 page  
ATA5423/25/28/29 [Preliminary]
Table 1-1.
Pin
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Pin Description (Continued)
Symbol
Function
VSOUT
Output voltage power supply for external devices
TEST2
Test input, at GND during operation
XTAL1
Reference crystal
XTAL2
Reference crystal
NC Not connected
VSINT
Microcontroller interface supply voltage
N_RESET Output pin to reset a connected microcontroller
IRQ Interrupt request
CLK Clock output to connect a microcontroller
SDO_TMDO Serial data out/transparent mode data out
SDI_TMDI Serial data in/transparent mode data in
SCK
Serial clock
DEM_OUT Demodulator open drain output signal
CS Chip select for serial interface
RSSI
Output of the RSSI amplifier
CDEM
Capacitor to adjust the lower cut–off frequency data filter
RX_TX2
GND pin to decouple LNA in TX mode
RX_TX1
Switch pin to decouple LNA in TX mode
PWR_ON Input to switch on the system (active high)
T5 Key input 5 (can also be used to switch on the system (active low))
T4 Key input 4 (can also be used to switch on the system (active low))
T3 Key input 3 (can also be used to switch on the system (active low))
T2 Key input 2 (can also be used to switch on the system (active low))
T1 Key input 1 (can also be used to switch on the system (active low))
RX_ACTIVE Indicates RX operation mode
NC Not connected
NC Not connected
GND
Ground/backplane
4841A–RKE–02/05
5
5 Page 
ATA5423/25/28/29 [Preliminary]
A low–IF architecture is also less sensitive to second–order intermodulation (IIP2) than direct
conversion receivers, where every pulse or AM–modulated signal (especially the signals from
TDMA systems like GSM) demodulates to the receiving signal band at second–order non–
linearities.
Note: –120 dBC/Hz at ±1 MHz and –75 dBC at ±FREF at 433.92 MHz
3.2 Input Matching at RF_IN
The measured input impedances as well as the values of a parallel equivalent circuit of these
impedances can be seen in Table 3-1. The highest sensitivity is achieved with power matching
of these impedances to the source impedance of 50 Ω
Table 3-1. Measured Input Impedances of the RF_IN Pin
fRF/MHz
315
Z(RF_IN)
(44–j233)Ω
345 TBD
433.92
(32–j169)Ω
868.3
(21–j78)Ω
915 TBD
Rp//Cp
1278 Ω//2.1 pF
TBD
925 Ω//2.1 pF
311 Ω//2.2 pF
TBD
The matching of the LNA Input to 50 Ω was done with the circuit shown in Figure 3-1 and with
the values given in Table 3-2 on page 12. The reflection coefficients were always ≤10 dB. Note
that value changes of C1 and L1 may be necessary to compensate for individual board layouts.
The measured typical FSK and ASK Manchester code sensitivities with a Bit Error Rate (BER) of
10–3 are shown in Table 3-3 and Table 3-4 on page 12. These measurements were done with
inductors having a quality factor according to Table 3-2, resulting in estimated matching losses
of 1.0 dB at 315 MHz, TBD dB at 345 MHz, 1.2 dB at 433.92 MHz, 0.6 dB at 868.3 MHz and
TBD dB at 915 MHz. These losses can be estimated when calculating the parallel equivalent
resistance of the inductor with Rloss = 2 × π × f × L × QL and the matching loss with
10 log(1 + Rp/Rloss).
With an ideal inductor, for example, the sensitivity at 433.92 MHz/FSK/20 kBaud/
±16 kHz/Manchester can be improved from -106 dBm to –107.2 dBm. The sensitivity depends
on the control logic which examines the incoming data stream. The examination limits must be
programmed in control registers 5 and 6. The measurements in Table 3-3 and Table 3-4 on
page 12 are based on the values of registers 5 and 6 according to Table 9-3 on page 61.
Figure 3-1. Input Matching to 50 Ω
C1
ATA5423/ATA5425/
ATA5428/ATA5429
4 RF_IN
L1
4841A–RKE–02/05
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATA5429.PDF ] | |
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| ATA5428 | (ATA5423 - ATA5429) UHF ASK/FSK Transceiver | ATMEL Corporation |
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