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PDF FAN7384 Data sheet ( Hoja de datos )
| Número de pieza | FAN7384 | |
| Descripción | Half-Bridge Gate-Drive IC | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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FAN7384
Half-Bridge Gate-Drive IC
Features
Floating Channel for Bootstrap Operation to +600V
Typically 250mA/500mA Sourcing/Sinking Current
Driving Capability for Both Channels
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VDD=VBS=15V
Matched Propagation Delay Below 50ns
Output In-Phase with Input Signal
3.3V and 5V Input Logic Compatible
Built-in Shoot-Through Prevention Logic
Built-in Common Mode dv/dt Noise Canceling Circuit
Built-in UVLO Functions for Both Channels
Built-in Cycle-by-Cycle Shutdown Function
Built-in Soft-Off Function
Built-in Bi-Directional Fault Function
Built-in Short-Circuit Protection Function
Applications
Motor Inverter Driver
Normal Half-Bridge and Full-Bridge Driver
Switching Mode Power Supply
November 2006
Description
The FAN7384 is a monolithic half-bridge gate-drive IC
designed for high voltage, high speed driving MOSFETs
and IGBTs operating up to +600V.
Fairchild’s high-voltage process and common-mode
noise canceling technique provide stable operation of
high-side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS = -9.8V (typical) for VBS =15V.
The UVLO circuits prevent malfunction when VDD and
VBS are lower than the specified threshold voltage.
Output drivers typically source/sink 250mA/500mA,
respectively, which is suitable for half-bridge and full-
bridge applications in motor drive systems.
14-SOP
1
Ordering Information
Part Number
FAN7384M
FAN7384MX
Package
14-SOP
Pb-Free
Yes
Operating Temperature
Range
-40°C ~ 125°C
Packing Method
Tube
Tape & Reel
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.1
www.fairchildsemi.com
1 page  
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the
conditions for actual device operation. TA=25°C, unless otherwise specified.
Symbol
Parameter
Min.
Max.
Unit
VS
VB
VHO
VDD
VIN
VCSC
VFO
dVS/dt
PD(1)(2)(3)
θJA
TJ
TS
High-side offset voltage VS
High-side floating supply voltage VB
High-side floating output voltage
Low-side and logic-fixed supply voltage
Logic input voltage (HIN, LIN, SD)
Current sense input voltage
Fault output voltage
Allowable offset voltage slew rate
Power dissipation
Thermal resistance, junction-to-ambient
Junction temperature
Storage temperature
VB-25
-0.3
VS-0.3
-0.3
-0.3
-0.3
-0.3
-55
VB+0.3
625
VB+0.3
25
VDD+0.3
VDD+0.3
VDD+0.3
50
1.0
110
150
150
V
V
V
V
V
V
V
V/ns
W
°C/W
°C
°C
Notes:
1. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
2. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
3. Do not exceed PD under any circumstances.
Recommended Operating Conditions
Symbol
Parameter
VB High-side floating supply voltage
VS High-side floating supply offset voltage
VDD supply voltage
VHO High-side output voltage
VLO Low-side output voltage
VIN Logic input voltage (HIN, LIN, SD)
VFO Fault output voltage
TA Ambient temperature
Condition
Min.
VS+13
6-VDD
13
VS
GND
GND
-0.3
-40
Max.
VS+20
600
20
VB
VDD
VDD
VDD+0.3
125
Unit
V
V
V
V
V
V
V
°C
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.1
5
www.fairchildsemi.com
5 Page 
Typical Characteristics (Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
1.0
0.8
0.6
0.4
0.2
0.0
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 23. Logic Input Low Voltage vs. Temperature
Figure 24. Logic Input Hysteresis vs. Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 25. SD Positive Threshold vs. Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 26. SD Negative Threshold vs. Temperature
0.60
0.55
0.50
0.45
0.40
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 27. VCSCREF vs. Temperature
2.4
2.0
1.6
1.2
0.8
0.4
0.0
-40 -20
0 20 40 60 80 100 120
Temperature [°C]
Figure 28. Fault Input High Voltage vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet FAN7384.PDF ] | |
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