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ISL24011 데이터시트 PDF




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부품번호 ISL24011 기능
기능 High Voltage TFT-LCD Logic Driver
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ISL24011 데이터시트, 핀배열, 회로
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®
Data Sheet
ISL24011
Octal Voltage Level Shifter for TFT/LCD Panels
October 21, 2005
FN6196.0
High Voltage TFT-LCD Logic Driver
The ISL24011 is a high voltage TFT-LCD logic driver with
+40V and -20V output voltage swing capability. It is
manufactured using Intersil’s proprietary monolithic high
voltage bipolar process and is capable of driving a 4700pF
load in 500ns.
The ISL24011 will level shift a digital input signal to an output
voltage nearly equal to its output supply voltages. The
ISL24011 has 3 supplies. VON1 and VON2 are positive
supplies with a voltage range between +10V and +40V.
VOFF is the negative supply with a voltage range between
-5V and -20V. Outputs 1 through 6 are connected to VON1
and VOFF. Outputs 7 and 8 are connected to VON2 and
VOFF. This configuration enables outputs 1 through 6 to
provide slicing to the row drivers to reduce flicker, and
outputs 7 and 8 to control possible supply lines. VON2
should remain constant. It is possible to tie VON1 and VON2
supplies together, if independent control as described above
is not desired. VON2 is required to be greater than or equal
to VON1 at all times.
The ISL24011 is available in a 20 Ld TSSOP package. It is
specified for operation over the -40°C to +85°C industrial
temperature range.
Ordering Information
PART
PART
TEMP.
PKG.
NUMBER MARKING RANGE (°C) PACKAGE DWG. #
ISL24011IVZ 24011IVZ -40 to +85 20 Ld TSSOP M20.173
(Note)
(Pb-free)
ISL24011IVZ-T 24011IVZ
(Note)
-40 to +85 20 Ld TSSOP M20.173
(Pb-free)
Tape & Reel
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Features
• 0V to 5.5V Input Voltage Range
• +40V and -20V Output Voltage Range
• 10mA Output Continuous Current (all 8 channels)
• 25mA Output Peak Current (all 8 channels)
• Rise/Fall Times 260ns/290ns
• Propagation Delay 230ns
• 50kHz Input Logic Frequency
• 20 Ld TSSOP Pb-Free Package
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• TFT-LCD panels
Pinout
ISL24011 (20 LD TSSOP)
TOP VIEW
GND 1
IN1 2
IN2 3
IN3 4
IN4 5
IN5 6
IN6 7
IN7 8
IN8 9
VOFF 10
20 VON1
19 OUT1
18 OUT2
17 OUT3
16 OUT4
15 OUT5
14 OUT6
13 OUT7
12 OUT8
11 VON2
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.




ISL24011 pdf, 반도체, 판매, 대치품
ISL24011
Pin Descriptions
PIN NUMBER
TSSOP-20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
GND
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
VOFF
VON2
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
VON1
EQUIVALENT
CIRCUIT
DESCRIPTION
4 Ground pin
1 Level shifter input 1
1 Level shifter input 2
1 Level shifter input 3
1 Level shifter input 4
1 Level shifter input 5
1 Level shifter input 6
1 Level shifter input 7
1 Level shifter input 8
4 Negative output supply for all channels
4 Positive output supply for channels 7 and 8. VON2 is required to be greater than or equal to VON1
3 Lever shifter output 8
3 Lever shifter output 7
2 Lever shifter output 6
2 Lever shifter output 5
2 Lever shifter output 4
2 Lever shifter output 3
2 Lever shifter output 2
2 Lever shifter output 1
4 Positive output supply for channels 1 through 6. VON1 is required to be less than or equal to
VON2
VON2
IN
VON1
OUT
VON2
OUT
CIRCUIT 1.
VOFF
OUTPUTS 1-6
VOFF
CIRCUIT 2.
OUTPUTS 7-8
CIRCUIT 3.
VOFF
VON2
VON1
VOFF
ESD CLAMP
CIRCUIT 4.
GND
4 FN6196.0
October 21, 2005

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ISL24011 전자부품, 판매, 대치품
ISL24011
Typical Performance Curves TA = 25°C, Output load parallel RC (RL = 5k, CL = 4700pF) unless otherwise specified. (Continued)
0
1800pF
PULSE INPUT
4700pF
0 VON1 & VON2 = 22V
VOFF = -5V
50kHz 10% DUTY CYCLE
400ns/DIV
FIGURE 13. TRANSIENT RESPONSE vs LOAD CAPACITANCE
Application Information
General
The ISL24011 is an octal voltage level shifter. The part was
designed to level shift a digital input signal to +22V and -5V
for TFT-LCD displays and is capable of level shifting input
logic signals (0V to 5.5V) to outputs as large as +40V and
-20V.
Power Supply Decoupling
The ISL24011 requires a 1.0µF decoupling capacitor as
close to the VON1, VON2 and VOFF power supply pins, as
possible, for a large load equal to 5kin parallel with
4700pF (Figure 16). This will reduce any dv/dt between the
different supplies and prevent the internal ESD clamp from
turning on and damaging the part.
For lighter loads such as a series 200resistor and a
3300pF capacitance, the decoupling capacitors can be
reduced to 0.47µF.
Power Supply Sequence
The ISL24011 requires that VON2 be greater than or equal to
VON1 at all times. Therefore, if VON1 and VON2 are different
supplies, then VON2 needs to be turned on before VON1.
The reason for this requirement is shown in Circuit 4 in the
Pin Description Table. The ESD protection diode between
VON2 and VON1 will forward bias if VON1 becomes a diode
drop greater than VON2. Recommended power supply
sequence: VON2, VON1, VOFF, then input logic signals.
The ESD protection scheme is based on diodes from the
pins to the VON2 supply and a dv/dt-triggered clamp. This
dv/dt-triggered clamp imposes a maximum supply turn-on
slew rate of 10V/µs. This clamp will trigger if the supply
powers up too fast, causing amps of current to flow. Ground
and VON1 are treated as I/O pins with this protection
scheme. In applications where the dv/dt supply ramp could
exceed 10V/µs, such as hot plugging, additional methods
should be employed to ensure the rate of rise is not
exceeded.
Latch-up Proof
The ISL24011 is manufactured in a high voltage DI process
that isolates every transistor in its own tub making the part
latch-up proof.
Input Pin Connections
Unused inputs must be tied to ground. Failure to tie unused
input pins to ground will result in rail to rail oscillations on the
respective output pins and higher unwanted power
dissipation in the part. Under these conditions, the
temperature of the part could get very hot.
Limiting the Output Current
No output short circuit current limit exists on this part. All
applications need to limit the output current to less than
80mA. Adequate thermal heat sinking of the parts is also
required.
Application Diagram (TV)
1.0µF
1.0µF
DC/DC
CONVERTER
VON1
VOFF
VON2
1.0µF
TIMING
CONTROLLER
ISL24011
LEVEL
SHIFTER
LCD PANEL
FIGURE 14. TYPICAL TV APPLICATION CIRCUIT
7 FN6196.0
October 21, 2005

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관련 데이터시트

부품번호상세설명 및 기능제조사
ISL24010

High Voltage TFT-LCD Logic Driver

Intersil Corporation
Intersil Corporation
ISL24011

High Voltage TFT-LCD Logic Driver

Intersil Corporation
Intersil Corporation

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