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ADP3191 데이터시트 PDF




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부품번호 ADP3191 기능
기능 Synchronous Buck Controller
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ADP3191 데이터시트, 핀배열, 회로
www.DataSheet4U.com
6-Bit, Programmable 2-/3-/4-Phase,
Synchronous Buck Controller
FEATURES
Selectable 2-, 3-, or 4-phase operation at up to
1 MHz per phase
±14.5 mV worst-case differential sensing error
over temperature
Logic-level PWM outputs for interface to external
high power drivers
PWM Flex-ModeTM architecture for excellent load
transient performance
Active current balancing between all output phases
Built-in power good/crowbar blanking supports on-the-fly
VID code changes
6-bit digitally programmable 0.8375 V to 1.6 V output
Programmable short circuit protection with programmable
latch-off delay
APPLICATIONS
Desktop PC power supplies for
Next-generation Intel® processors
VRM modules
Games consoles
GENERAL DESCRIPTION
The ADP3191/ADP3191A1 are highly efficient, multiphase,
synchronous buck switching regulator controllers optimized for
converting a 5 V or 12 V main supply into the core supply voltage
required by high performance Intel processors. They use an
internal 6-bit DAC to read a voltage identification (VID) code
directly from the processor, which is used to set the output
voltage between 0.8375 V and 1.6 V. The devices use a multimode
PWM architecture to drive the logic-level outputs at a program-
mable switching frequency that can be optimized for VR size
and efficiency. The phase relationship of the output signals can
be programmed to provide 2-, 3-, or 4-phase operation, allowing
for the construction of up to four complementary buck
switching stages.
The ADP3191/ADP3191A also include programmable, no-load
offset and slope functions to adjust the output voltage as a function
of the load current, so it is always optimally positioned for a
system transient. The ADP3191/ADP3191A also provide
accurate and reliable short-circuit protection, adjustable current
limiting, and a delayed power good output that accommodates
on-the-fly output voltage changes requested by the CPU.
ADP3191
FUNCTIONAL BLOCK DIAGRAM
VCC
28
SHUNT
REGULATOR
(ADP3191 ONLY)
EN 11
GND 19
UVLO
SHUTDOWN
AND BIAS
DAC+150mV
CSREF
DAC–250mV
PWRGD 10
DELAY
RAMPADJ RT
14 13
OSCILLATOR
CMP
SET
RESET
EN
27 PWM1
CURRENT
BALANCING
CIRCUIT
CMP
CMP
RESET
2-/3-/4-PHASE
DRIVER LOGIC
RESET
26 PWM2
25 PWM3
CMP
RESET
24 PWM4
CROWBAR
CURRENT
LIMIT
ILIMIT 15
EN
DELAY 12
COMP 9
SOFT
START
CURRENT
LIMIT
CIRCUIT
23 SW1
22 SW2
21 SW3
20 SW4
17 CSSUM
16 CSREF
18 CSCOMP
8 FB
PRECISION
REFERENCE
VID
DAC
7
FBRTN
123456
VID4 VID3 VID2 VID1 VID0 VID5
Figure 1.
ADP3191/
ADP3191A
The ADP3191 is a replacement for the ADP3181. A built-in
shunt regulator allows the part to be connected to the 12 V
system supply through a series resistor.
The devices are specified over the commercial temperature
range of 0°C to 85°C and are available in a 28-lead TSSOP
and a 28-lead QSOP.
1 Protected by U. S. Patent Number 6,683,441; other patents pending.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.




ADP3191 pdf, 반도체, 판매, 대치품
ADP3191
Parameter
Current Limit Threshold Voltage
Current Limit Setting Ratio
DELAY Normal Mode Voltage
DELAY Overcurrent Threshold
Latch-Off Delay Time
SOFT START
Output Current, Soft Start Mode
Soft Start Delay Time
ENABLE INPUT
Input Low Voltage
Input High Voltage
Input Current
POWER GOOD COMPARATOR
Undervoltage Threshold
Overvoltage Threshold
Output Low Voltage
Power Good Delay Time
During Soft Start
VID Code Changing
VID Code Static
Crowbar Trip Point
Crowbar Reset Point
Crowbar Delay Time
VID Code Changing
VID Code Static
PWM OUTPUTS
Output Low Voltage
Output High Voltage
SUPPLY—ADP3191
VCC
DC Supply Current
UVLO Threshold Voltage
UVLO Hysteresis
SUPPLY—ADP3191A
VCC
DC Supply Current
UVLO Threshold Voltage
UVLO Hysteresis
Symbol
VCL
VDELAY(NM)
VDELAY(OC)
tDELAY
Conditions
VCSREF − VCSCOMP, RILIMIT = 250 kΩ
VCL/IILIMIT
RDELAY = 250 kΩ
RDELAY = 250 kΩ
RDELAY = 250 kΩ, CDELAY = 12 nF
IDELAY(SS)
tDELAY(SS)
During startup, DELAY < 2.8 V
RDELAY = 250 kΩ, CDELAY = 12 nF,
VID code = 011111
VIL(EN)
VIH(EN)
IIL(EN)
VPWRGD(UV)
VPWRGD(OV)
VOL(PWRGD)
Relative to nominal DAC output
Relative to nominal DAC output
IPWRGD(SINK) = 4 mA
RDELAY = 250 kΩ, CDELAY = 12 nF,
VID code = 011111
VCROWBAR
tCROWBAR
Relative to nominal DAC output
Relative to FBRTN
Overvoltage to PWM going low
Blanking time
VOL(PWM)
VOH(PWM)
VCC
IPWM(SINK) = –400 μA
IPWM(SOURCE) = +400 μA
VSYSTEM = 12 V, RSHUNT = 300 Ω, see Figure 4
VUVLO
VCC rising
VSYSTEM = 5 V, RSHUNT = 10 Ω, see Figure 4
VCC
VUVLO
VCC rising
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
2 Guaranteed by design, not production tested.
3 Relative current matching from each phase to the average of all four phases.
Min Typ Max Unit
105 125 145 mV
10.4 mV/μA
2.8 3
3.3 V
1.6 1.9 2.2 V
1.5 ms
15 20 25 μA
1 ms
0.4 V
0.8 V
–1 +1 μA
–180
230
–250 –300
300 370
225 400
mV
mV
mV
1 ms
100 250
μs
200 ns
270 300 350 mV
620 730 840 mV
100 250
400
μs
ns
160 500 mV
4.0 5
V
4.75 5
20
6.3 7
0.9
30
8.0
V
mA
V
V
4.75 5
7
3.7 4.0
0.9
12
4.3
V
mA
V
V
Rev. 0 | Page 4 of 28

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ADP3191 전자부품, 판매, 대치품
ADP3191
TYPICAL PERFORMANCE CHARACTERISTICS AND TEST CIRCUITS
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0
50 100 150 200 250 300
RT (k)
12V
300
39k
1k
1.0V
ADP3191
VCC
28
CSCOMP
18
100nF
CSSUM
17
CSREF
16
GND
19
VOS =
CSCOMP – 1V
40
Figure 3. Master Clock Frequency vs. RT
Figure 5. Current Sense Amplifier VOS
6-BIT CODE
1k
1.25V
12nF 250k
ADP3191
12V
ADP3191
ADP3191A
1 VID4
VCC 28
2 VID3
PWM1 27
240
+1µF
100nF
3 VID2
PWM2 26
4 VID1
PWM3 25
5 VID0
PWM4 24
6 VID5
SW1 23
7 FBRTN
SW2 22
8 FB
SW3 21
9 COMP
SW4 20
10 PWRGD
GND 19
11 EN
12 DELAY
CSCOMP 18
20k
CSSUM 17
100nF
13 RT
CSREF 16
14 RAMPADJ
ILIMIT 15
250k
ADP3191A
5V
ADP3191
12V
240
ADP3191A
5V
200k
200k100nF
ΔV
1.0V
ADP3191/ADP3191A
VCC
28
CSCOMP
18
CSSUM
17
CSREF
16
GND
19
ΔVFB = FBΔV = 80mV – FBΔV = 0mV
Figure 6. Positioning Voltage
Figure 4. Closed-Loop Output Voltage Accuracy
Rev. 0 | Page 7 of 28

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