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VRS51X550 데이터시트 PDF




Ramtron에서 제조한 전자 부품 VRS51X550은 전자 산업 및 응용 분야에서
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부품번호 VRS51X550 기능
기능 (VRS51X550 / VRS51X560) Versa 8051 MCUs
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VRS51X550 데이터시트, 핀배열, 회로
www.DataSheet4U.com
VRS51x550/560
Datasheet
Rev 1.3
Versa 8051 MCUs with 8/16KB Flash
Overview
The VRS51x550 and VRS51x560 are low-cost 8-bit
microcontrollers based on the standard 80C51
microcontroller architecture. They are pin compatible
drop-in replacements for the 8051
Ideal for a wide range of applications requiring low to
midrange amounts of program/data memory, coupled
with streamlined peripheral support, the VRS51x550/560
devices feature 8KB/16KB, of Flash memory
(respectively), 256 bytes of RAM, a UART, three 16-bit
timers, a watchdog timer and power saving modes.
The VRS51x550 is available in 3.3 (VRS51L550) or 5
volt versions (VRS51C550), while the VRS51x560 is
available in a 5 volt version (VRS51C560). All devices
come in PLCC-44, QFP-44 and DIP-40 packages and
operate in the industrial temperature range. Flash can
be programmed using a parallel programmer available
from Ramtron or with a third party commercial
programmer.
FIGURE 1: VRS51X550 / VRS51X560 FUNCTIONAL DIAGRAM
Feature Set
80C51/80C52 pin compatible
12 clock periods per machine cycle
8KB / 16KB on-chip Flash memory
256 Bytes on-chip data RAM
32 I/O lines on four 8-bit ports
Full duplex serial port (UART)
3, 16-bit Timers/Counters
Watchdog Timer
8-bit Unsigned Division / Multiply
BCD arithmetic
Direct and Indirect Addressing
Two levels of interrupt priority and nested interrupts
Power saving modes
Code protection function
Operates at a clock frequency of up to 40MHz
Low EMI (inhibit ALE)
Programming voltage: 12V
Industrial Temperature range (-40°C to +85°C)
5V and 3V versions available (see ordering information)
FIGURE 2: VRS51X550 / VRS51X560 PLCC AND QFP PINOUT DIAGRAMS
8KB / 16KB
FLASH
256
Bytes of RAM
UART
2 INTERRUPT
INPUTS
TIMER 0
TIMER 1
TIMER 2
RESET
8051
PROCESSOR
ADDRESS/
DATA BUS
PORT 0
PORT 1
PORT 2
PORT 3
POWER
CONTROL
WATCHDOG
TIMER
8
8
8
8
P1.5
P1.6
P1.7
RESET
RXD/P3.0
NC
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
6 40
7 1 39
VRS51x550/560
PLCC-44
17 29
18 28
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7
#EA
NC
ALE
#PSEN
P2.7/A15
P2.6/A14
P2.5/A13
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
NC
T2/P1.0
T2EX/P1.1
P1.2
P1.3
P1.4
33
34
23
22
VRS51x550/560
QFP-44
44 12
1 11
P2.4/A12
P2.3/A11
P2.2/A10
P2.1/A9
P2.0/A8
NC
VSS
XTAL1
XTAL2
#RD/P3.7
#WR/P3.6
Ramtron International Corporation ? http://www.ramtron.com
1850 Ramtron Drive Colorado Springs ? MCU customer service: 1-800-943-4625, 1-514-871-2447, ext. 208
Colorado, USA, 80921 ? 1-800-545-FRAM, 1-719-481-7000
page 1 of 40




VRS51X550 pdf, 반도체, 판매, 대치품
VRS51x550/560
Pin Descriptions for DIP-40
TABLE 3: PIN DESCRIPTIONS FOR DIP-40
DIP40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
T2
P1.0
T2EX
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RESET
RXD
P3.0
TXD
P3.1
#INT0
P3.2
#INT1
P3.3
T0
P3.4
T1
P3.5
#WR
P3.6
#RD
P3.7
XTAL2
XTAL1
VSS
I/O Function
I Timer 2 Clock Out
I/O Bit 0 of Port 1
I Timer 2 Control
I/O Bit 1 of Port 1
I/O Bit 2 of Port 1
I/O Bit 3 of Port 1
I/O Bit 4 of Port 1
I/O Bit 5 of Port 1
I/O Bit 6 of Port 1
I/O Bit 7 of Port 1
I Reset
I Receive Data
I/O Bit 0 of Port 3
O Transmit Data &
I/O Bit 1 of Port 3
I External Interrupt 0
I/O Bit 2 of Port 3
I External Interrupt 1
I/O Bit 3 of Port 3
I Timer 0
I/O Bit 4 of Port 3
I Timer 1 & 3
I/O Bit 5 of Port
O Ext. Memory Write
I/O Bit 6 of Port 3
O Ext. Memory Read
I/O Bit 7 of Port 3
O Oscillator/Crystal Output
I Oscillator/Crystal In
- Ground
T2 / P1.0
T2EX / P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RESET
RXD / P3.0
TXD / P3.1
#INT0 / P3.2
#INT1 / P3.3
T0 / P3.4
T1 / P3.5
#WR / P3.6
#RD / P3.7
XTAL2
XTAL1
VSS
1 40
2 39
3 38
4 37
5 36
6 35
7 34
8 33
9 VRS51x550 32
10 VRS51x560 31
11 DIP-40 30
12 29
13 28
14 27
15 26
16 25
17 24
18 23
19 22
20 21
VDD
P0.0 / AD0
P0.1 / AD1
P0.2 / AD2
P0.3 / AD3
P0.4 / AD4
P0.5 / AD5
P0.6 / AD6
P0.7 / AD7
#EA / VPP
ALE
PSEN
P2.7 / A15
P2.6 / A14
P2.5 / A13
P2.4 / A12
P2.3 / A11
P2.2 / A10
P2.1 / A9
P2.0 / A8
DIP40
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Name
P2.0
A8
P2.1
A9
P2.2
A10
P2.3
A11
P2.4
A12
P2.5
A13
P2.6
A14
P2.7
A15
#PSEN
ALE
#EA /
VPP
P0.7
AD7
P0.6
AD6
P0.5
AD5
P0.4
AD4
P0.3
AD3
P0.2
AD2
P0. 1
AD1
P0.0
AD0
VDD
I/O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
I/O
O
O
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
Function
Bit 0 of Port 2
Bit 8 of External Memory Address
Bit 1 of Port 2
Bit 9 of External Memory Address
Bit 2 of Port 2
Bit 10 of External Memory Address
Bit 3 of Port 2 &
Bit 11 of External Memory Address
Bit 4 of Port 2
Bit 12 of External Memory Address
Bit 5 of Port 2
Bit 13 of External Memory Address
Bit 6 of Port 2
Bit 14 of External Memory Address
Bit 7 of Port 2
Bit 15 of External Memory Address
Program Store Enable
Address Latch Enable
External Access
Flash programming voltage input
Bit 7 Of Port 0
Data/Address Bit 7 of External
Memory
Bit 6 of Port 0
Data/Address Bit 6 of External
Memory
Bit 5 of Port 0
Data/Address Bit 5 of External
Memory
Bit 4 of Port 0
Data/Address Bit 4 of External
Memory
Bit 3 Of Port 0
Data/Address Bit 3 of External
Memory
Bit 2 of Port 0
Data/Address Bit 2 of External
Memory
Bit 1 of Port 0 & Data
Address Bit 1 of External Memory
Bit 0 Of Port 0 & Data
Address Bit 0 of External Memory
Supply input
________________________________________________________________________________________________
www.ramtron.com
page 4 of 40

4페이지










VRS51X550 전자부품, 판매, 대치품
VRS51x550/560
Program Memory
Program Memory
The VRS51x550 includes 8KB of on-chip Program
Flash memory. The VRS51x560 includes 16KB
Program Flash memory.
FIGURE 3: VRS51X560 / VRS51X550 INTERNAL PROGRAM MEMORY
3FFFh
VRS51x560
Flash Memory
(16K Bytes)
0000h
1FFFh
0000h
RM51x550
Flash Memory
(8K Bytes)
Program Status Word Register
The PSW register is a bit addressable register that
contains the status flags (CY, AC, OV, P), user flag
(F0) and register bank select bits (RS1, RS0) of the
8051 processor.
TABLE 7: PROGRAM STATUS WORD REGISTER (PSW) - SFR DOH
7 6543
2
CY AC F0 RS1 RS0 OV
1
-
Bit Mnemonic Description
7 CY
Carry Bit
6 AC
Auxiliary Carry Bit from bit 3 to 4.
5 F0
User definer flag
4 RS1
R0-R7 Registers bank select bit 0
3 RS0
R0-R7 Registers bank select bit 1
2 OV
Overflow flag
1-
-
0P
Parity flag
0
P
RS1 RS0
00
01
10
11
Active Bank
0
1
2
3
Address
00h-07h
08h-0Fh
10h-17h
18-1Fh
Data Pointer
The VRS51x550 and VRS51x560 each have one 16-bit
data pointer. The DPTR is accessed through two SFR
addresses: DPL located at address 82h and DPH
located at address 83h.
Data Memory
The VRS51x550 and VRS51x560 each have a total of:
256 bytes of RAM configured like the internal memory
structure of a standard 8052.
FIGURE 4: VRS51X550 /VRS51X560 RAM MEMORY OVERVIEW
Lower 128 bytes (00h to 7Fh, Bank 0 & Bank 1)
The lower 128 bytes of data memory (from 00h to 7Fh)
is summarized as follows:
Address range 00h to 7Fh can be accessed in
direct and indirect addressing modes.
Address range 00h to 1Fh includes R0-R7
registers area.
Address range 20h to 2Fh is bit addressable.
Address range 30h to 7Fh is not bit addressable
and can be used as general-purpose storage.
Upper 128 bytes (80h to FFh, Bank 2 & Bank 3)
The upper 128 bytes of data memory (from 80h to FFh)
can be accessed using indirect addressing or by using
the bank mapping in direct addressing mode.
FIGURE 5: VRS51X550 / VRS51X560 RAM STRUCTURE
FFh
FFh
128 Bytes of
Indirect Access RAM
(SP, R0,R1)
SFR Area
Direct or Bit Access
Only
85 84 83 82 81 80
DPH
DPL
SP
P0
80h
7Fh
80 Bytes of
General Purpose RAM
30h
2Fh
7F 7E 7D 7C 7B 7A 79 78
77 76 75 74 73 72 71 70
0F 0E 0D 0C 0B 0A 09 08
20h
07 06 05 04 03 02 01 00
R7
- Registers Bank 3
18h R0
R7
- Registers Bank 2
10h R0
R7
- Registers Bank 1
08h R0
R7
- Registers Bank 0
00h R0
______________________________________________________________________________________________
www.ramtron.com
page 7 of 40

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VRS51X550

(VRS51X550 / VRS51X560) Versa 8051 MCUs

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