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PDF 74AUP1G79 Data sheet ( Hoja de datos )
| Número de pieza | 74AUP1G79 | |
| Descripción | Low-power D-type flip-flop | |
| Fabricantes | NXP Semiconductors | |
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74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Rev. 01 — 12 September 2005
Product data sheet
1. General description
The 74AUP1G79 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock
pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock
transition for predictable operation.
2. Features
s Wide supply voltage range from 0.8 V to 3.6 V
s High noise immunity
s Complies with JEDEC standards:
x JESD8-12 (0.8 V to 1.3 V)
x JESD8-11 (0.9 V to 1.65 V)
x JESD8-7 (1.2 V to 1.95 V)
x JESD8-5 (1.8 V to 2.7 V)
x JESD8-B (2.7 V to 3.6 V)
s ESD protection:
x HBM JESD22-A114-C exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Low static power consumption; ICC = 0.9 µA (maximum)
s Latch-up performance exceeds 100 mA per JESD 78 Class II
s Inputs accept voltages up to 3.6 V
s Low noise overshoot and undershoot < 10 % of VCC
s IOFF circuitry provides partial Power-down mode operation
s Multiple package options
s Specified from −40 °C to +85 °C and −40 °C to +125 °C
1 page  
Philips Semiconductors
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Table 6: Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min Max Unit
IGND
Tstg
Ptot
ground current
storage temperature
total power
dissipation
Tamb = −40 °C to +125 °C
-
−65
[2] -
−50
+150
250
mA
°C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 45 °C the value of Ptot derates linearly with 2.4 mW/K.
10. Recommended operating conditions
Table 7:
Symbol
VCC
VI
VO
Tamb
tr, tf
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
output voltage
active mode
ambient temperature
Power-down mode; VCC = 0 V
input rise and fall times VCC = 0.8 V to 3.6 V
Min Max Unit
0.8 3.6 V
0 3.6 V
0 VCC V
0 3.6 V
−40 +125 °C
0 200 ns/V
11. Static characteristics
Table 8: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = 25 °C
VIH HIGH-state input voltage
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
0.70 × VCC -
0.65 × VCC -
VCC = 2.3 V to 2.7 V
1.6 -
VCC = 3.0 V to 3.6 V
2.0 -
VIL LOW-state input voltage VCC = 0.8 V
--
VCC = 0.9 V to 1.95 V
--
VCC = 2.3 V to 2.7 V
--
VCC = 3.0 V to 3.6 V
--
Max Unit
-V
-V
-V
-V
0.30 × VCC V
0.35 × VCC V
0.7 V
0.9 V
9397 750 14682
Product data sheet
Rev. 01 — 12 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 20
5 Page 
Philips Semiconductors
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
Table 9: Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7
Symbol Parameter
Conditions
tW CP pulse width HIGH or LOW see Figure 6
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
CPD power dissipation capacitance f = 10 MHz
VCC = 0.8 V
VCC = 1.1 V to 1.3 V
VCC = 1.4 V to 1.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
[1] All typical values are measured at nominal VCC.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[3] The condition is VI = GND to VCC.
Min
-
-
-
-
-
-
[2] [3]
-
-
-
-
-
-
Typ [1] Max
Unit
--
2.4 -
1.3 -
0.9 -
0.7 -
0.6 -
ns
ns
ns
ns
ns
ns
2.2 -
2.2 -
2.2 -
2.3 -
2.6 -
3.0 -
pF
pF
pF
pF
pF
pF
9397 750 14682
Product data sheet
Rev. 01 — 12 September 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 20
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