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FSB50250 데이터시트 PDF




Fairchild Semiconductor에서 제조한 전자 부품 FSB50250은 전자 산업 및 응용 분야에서
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부품번호 FSB50250 기능
기능 Smart Power Module
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FSB50250 데이터시트, 핀배열, 회로
www.DataSheet4U.com
FSB50250
Smart Power Module (SPM)
May 2005
SPM TM
Features
• 500V 2.0A 3-phase FRFET inverter including high voltage
integrated circuit (HVIC)
• 3 divided negative dc-link terminals for inverter current sens-
ing applications
• HVIC for gate driving and undervoltage protection
• 3/5V CMOS/TTL compatible, active-high interface
• Optimized for low electromagnetic interference
• Isolation voltage rating of 1500Vrms for 1min.
General Description
FSB50250 is a tiny smart power module (SPMTM) based on
FRFET technology as a compact inverter solution for small
power motor drive applications such as fan motors and water
suppliers. It is composed of 6 fast-recovery MOSFET (FRFET),
and 3 half-bridge HVICs for FRFET gate driving. FSB50250
provides low electromagnetic interference (EMI) characteristics
with optimized switching speed. Moreover, since it employs
FRFET as a power switch, it has much better ruggedness and
larger safe operation area (SOA) than that of an IGBT-based
power module or one-chip solution. The package is optimized
for the thermal performance and compactness for the use in the
built-in motor application and any other application where the
assembly space is concerned. FSB50250 is the most solution
for the compact inverter providing the energy efficiency,
compactness, and low electromagnetic interference.
Absolute Maximum Ratings
Symbol
VPN
ID25
ID80
IDP
PD
VCC
VBS
VIN
TJ
TSTG
RθJC
VISO
Parameter
DC Link Input Voltage,
Drain-source Voltage of each FRFET
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Peak
Maximum Power Dissipation
Control Supply Voltage
High-side Bias Voltage
Input Signal Voltage
Operating Junction Temperature
Storage Temperature
Junction to Case Thermal Resistance
Isolation Voltage
Conditions
Rating
500
TC = 25°C
TC = 80°C
TC = 25°C, PW < 100µs
TC = 80°C, For Each FRFET
Applied between VCC and COM
Applied between VB and VS
Applied between IN and COM
1.0
0.7
2.0
4.5
20
20
-0.3 ~ VCC+0.3
-20 ~ 125
Each FRFET under inverter operat-
ing condition (Note 1)
-50 ~ 150
9.3
60Hz, Sinusoidal, 1 minute, Con-
nection pins to heatsink
1500
Units
V
A
A
A
W
V
V
V
°C
°C
°C/W
Vrms
©2005 Fairchild Semiconductor Corporation
FSB50250 Rev. B
1
www.fairchildsemi.com




FSB50250 pdf, 반도체, 판매, 대치품
Recommended Operating Conditions
Symbol
Parameter
Conditions
VPN
VCC
VBS
VIN(ON)
VIN(OFF)
tdead
fPWM
TC
Supply Voltage
Applied between P and N
Control Supply Voltage
High-side Bias Voltage
Input ON Threshold Voltage
Input OFF Threshold Voltage
Applied between VCC and COM
Applied between VB and VS
Applied between IN and COM
Blanking Time for Preventing
Arm-short
VCC=VBS=13.5 ~ 16.5V, TJ 125°C
PWM Switching Frequency TJ 125°C
Case Temperature
TJ 125°C
Min.
-
13.5
13.5
3.0
0
Value
Typ.
300
15
15
Max.
400
16.5
16.5
VCC
0.6
Units
V
V
V
V
V
1.0 -
- µs
- 15 - kHz
-20 100 °C
15-V Line
These values depend on PWM
control algorithm
R2
Micom
R1 D1
R5
C5
VCC
HIN
LIN
COM
VB
HO
VS
LO
10µF
C2 C1
One-Leg Diagram of SPM
* Example of bootstrap paramters:
C1 = C2 = 1µF ceramic capacitor,
R1 = 56Ω, R2 = 20
P VDC
Inverter
Output
C3
N R3
HIN
0
0
1
1
Open
LIN
0
1
0
1
Open
Output
Note
Z Both FRFET Off
0 Low-side FRFET On
VDC High-side FRFET On
Forbidden
Shoot-through
Z Same as (0, 0)
Note:
(1) It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 600-V rating
(2) Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
(3) RC coupling(R5 and C5) at each input (indicated as dotted lines) may be used to prevent improper input signal due to surge noise. Signal input of SPM is compatible with stan-
dard CMOS or LSTTL outptus.
(4) Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2
and C3 should have good high-frequency characteristics to absorb high-frequency ripple current.
Figure 2. Recommended CPU Interface and Bootstrap Circuit with Parameters
14.50 mm
3.80 mm
Note:
MOSFET
Case Temperature (TC)
Detecting Point
Attach the thermocouple on top of the heatsink-side of SPM (between SPM and heatsink if applied) to get the correct temperature measurement.
Figure 3. Case Temperature Measurement
FSB50250 Rev. B
4 www.fairchildsemi.com

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FSB50250 전자부품, 판매, 대치품
Detailed Package Outline Drawings
MAX1.00
0.60 ±0.10
(0.30)
(1.165)
15*1.778=26.67±0.30
13.34±0.30
#1
#16
(1.80)
(1.00)
R0.40
#17
12.23±0.30
13.13±0.30
#23
29.00±0.20
2x3.90=7.80±0.30
(2.275)
4x3.90=15.60±0.30
1.95 ±0.30
3.10±0.20
8.10 ±0.20
(0.30)
0.60 ±0.10
MAX1.00
FSB50250 Rev. B
7 www.fairchildsemi.com

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