QR0001 Datasheet PDF - National Semiconductor
| Part Number | QR0001 | |
| Description | QuickRing Data Stream Controller | |
| Manufacturers | National Semiconductor | |
| Logo |  |
|
|
There is a preview and QR0001 download ( pdf file ) link at the bottom of this page. Total 30 Pages | ||
Preview 1 page No Preview Available !
www.DataSheet4U.com
PRELIMINARY
October 1994
QR0001
QuickRingTM Data Stream Controller
General Description
QuickRing is a point-to-point data transfer architecture de-
signed to facilitate high speed data streams The QuickRing
architecture can be applied both inside the chassis as well
as outside the chassis environments to increase data
throughput Each QR0001 QuickRing Controller node in the
ring is capable of streaming up to 231 MSamples s per sig-
nal line simultaneously including protocol overhead This
device is intended for use in applications that handle high-
bandwidth data streams associated with graphics uncom-
pressed video disk arrays high-speed local area networks
multiprocessor systems and to interconnect peripherals
over a few meters of cable The QR0001 QuickRing Con-
troller can be used to augment the performance of tradition-
al backplane buses in personal computers workstations
and high-end systems The QR0001 is useful for routing
high-bandwidth streams in systems that are larger or topo-
logically more complex than bus-based systems
Features
Y 160-pin PQFP package
Y 16 node single ring capability
Y Peak theoretical rate over 1 GByte sec for 16 node
ring
Y Support for Multi-Ring topologies
Y Error detection detects 1- and 2-bit errors
RING INTERFACE
Y Precision PLL captures data at 231 MSamples s max
Y 33 MHz maximum ring clock frequency
Y Low Voltage Differential Signaling (LVDS) ring interface
(IEEE P1596 3)
CLIENT INTERFACE
Y 132 MBytes s data transfer rate at both Tx and Rx
ports
Y 32-bit transmit and receive data ports
Y Readable internal diagnostic register
Y TTL signal interface
Block Diagram
QuickRingTM is a trademark of Apple Computer Incorporated
C1995 National Semiconductor Corporation TL F 11928
TL F 11928 – 1
RRD-B30M75 Printed in U S A
|
| |
 
2 0 Basic Structure
3 0 Client Interface
3 1 Type and Symbol Fields at the Client Ports
The QuickRing client can multiplex multiple independent
data streams onto and from the transmit (Tx) and receive
(Rx) ports of the controller The type fields (TxT 1 01
RxT 1 01 ) distinguishes the contents of the symbol (main
data) fields (TxS 31 0 RxS 31 0 ) The type field identifies
the nature of the symbol field information at the 32-bit ports
as head data frame or null
The transmit port can be thought of as the input to a bank of
fast deep FIFOs connected to other nodes on the ring The
receive port can be treated as the output of the bank of
FIFOs connected to other nodes on the ring Figure 3 1 il-
lustrates the controller’s client interface
TL F 11928 – 10
FIGURE 2 2 Logical Data flow
(QuickRing Virtual FIFOs)
Figure 2 3 shows that data physically moves in a ring from
card to card data traverses the ring until it arrives at the
final destination Physical data flow is unidirectional and
propagates downstream between nearest neighbors
TL F 11928 – 3
FIGURE 2 3 Physical Data Flow in QuickRing
TL F 11928 – 4
FIGURE 2 4 A Sub-Symbol is Multiplexed Every 2 9 ns
The ring formed by connecting Up and Dn ports of adjacent
QuickRing controllers carries one 42-bit symbol every
20 ns The 42-bit symbol is composed of
32 bits of data
1 Frame bit
2 control bits and
7 bits of EDC
To transmit 42 bits in 20 ns QuickRing divides the 42-bit
symbol into 7 sub-symbols each sub-symbol is 6 bits wide
The controller then multiplexes the sub-symbols onto the 6
LVDS pairs on the downstream port A 7th LVDS clock sig-
nal at 50 MHz (maximum) accompanies every 42-bit sym-
bol transmission Refer to Figure 2 4
TL F 11928 – 5
FIGURE 3 1 Client Ports of a QuickRing Controller
3 2 Client Transmit Port
Figure 3 2 shows the block diagram of the transmit port The
transmit block of QR0001 is formed by Tx Port Tx Resyn-
chronizer Tx Router and 3 independent FIFOs All of these
blocks form the transmit pipeline
1 The Tx Port is the first stage into the transmit pipeline
The Transmit port is a 4 deep pipeline
2 The Tx Resynchronizer is a 32-deep asynchronous FIFO
in the path between the Tx Port and the Tx Router
Note The Tx Resynchronizer will handle the frequency disconnect between
the Tx Port and ring logic This function will be implemented on the
next QuickRing device QR1001
3 The Tx Router directs the streams to the appropriate
channel efficiently (described later)
4 FIFOs X and Y are meant for handling one independent
high bandwidth stream each and the LB (Low Band-
width) FIFO is meant for low bandwidth transmissions
The FIFOs contain the data frame part of the client
stream (The Head information is held in a separate hold-
ing latch internally )
The sole purpose of providing two normal (high bandwidth)
FIFOs (X and Y) is so that the client may switch from trans-
mitting one stream to another without slowing down or wast-
ing available ring bandwidth during the context switch
On release of RESET any payload symbols at the transmit
port are ignored until the first head symbol is presented at
the input of the Tx Port QR0001 always checks for consec-
utive heads and ignores all redundant heads The type and
symbol fields are latched internally according to the timing
specified by the state of the PIPE signal
When the client starts a transmission it writes a head fol-
lowed by a stream of payloads QR0001 receives these
symbols through the transmit port and directs them to either
the X Y or LB FlFO Any head symbol with the CONN (see
Section 3 6) field equal to 1 is always routed to the LB FIFO
as is every payload symbol following such a head Any other
head with the CONN field equal to 0 and all payloads follow-
ing such a head are routed to either the X or Y FIFO
5
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for QR0001 electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ QR0001.PDF Datasheet ] | |
Share Link :
Electronic Components Distributor
|
An electronic components distributor is a company that sources, stocks, and sells electronic components to manufacturers, engineers, and hobbyists. |
| SparkFun Electronics | Allied Electronics | DigiKey Electronics | Arrow Electronics |
| Mouser Electronics | Adafruit | Newark | Chip One Stop |
Featured Datasheets
| Part Number | Description | MFRS |
| QR0001 | The function is QR0001 QuickRing Data Stream Controller (Rev. A). Texas Instruments |  |
| QR0001 | The function is QuickRing Data Stream Controller. National Semiconductor | |
Semiconductors commonly used in industry:
1N4148 |
BAW56 |
1N5400 |
NE555 | | ||
Quick jump to:
QR00
1N4
2N2
2SA
2SC
74H
BC
HCF
IRF
KA | ||