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PDF PM6681A Data sheet ( Hoja de datos )
| Número de pieza | PM6681A | |
| Descripción | DUAL STEP-DOWN CONTROLLER | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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PM6681A
Dual step-down controller with adjustable LDO
Target Specification
Features
■ 6V to 36V input voltage range
■ Adjustable output voltages
■ 0.9-3.3V LDO adjustable delivers 100mA peak
current
■ 5V LDO delivers 100mA peak current
■ 1.237V ±1% reference voltage available
■ NO RSENSE current sensing using low side
MOSFETs' RDS(on)
■ Negative current limit
■ Soft start internally fixed at 2ms
■ Soft output discharge
■ Latched UVP
■ Not-latched OVP
■ Selectable pulse skipping at light loads
■ Selectable minimum frequency(33kHz) in
pulse skip mode
■ 5mW maximum quiescent power
■ Indipendent power good signals
■ Output voltage ripple compensation
Applications
■ Embedded computer system
■ FPGA system power
■ Industrial applications on 24V
■ High performance and high density DC/DC
modules
VFQFPN-32 (5mm x 5mm)
Description
PM6681A is a dual step-down controller
specifically designed to provide extremely high
efficiency conversion, with lossless current
sensing technique. The constant on-time
architecture assures fast load transient response
and the embedded voltage feed-forward provides
nearly constant switching frequency operation. An
embedded integrator control loop compensates
the DC voltage error due to the output ripple.
Pulse skipping technique increases efficiency at
very light load. Moreover a minimum switching
frequency of 33kHz is selectable to avoid audio
noise issues. The PM6681A provides a selectable
switching frequency, allowing three different
values of switching frequencies for the two
switching sections. The output voltages OUT1
and OUT2 can be adjusted from 0.9V to 5V and
from 0.9V to 3.3V respectively. The device
provides also 2 LDOs, 5V fixed and 0.9V-3.3V
adjustable.
Order codes
Part number
PM6681A
PM6681ATR
Package
VFQFPN-32 (5mm x 5mm)
VFQFPN-32 (5mm x 5mm)
Packaging
Tube
Tape and Reel
November 2006
Rev 1
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
1/12
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12
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PM6681A
Pin settings
2.2 Functions
Table 1. Pin functions
N° Pin
Function
Signal ground. Reference for internal logic circuitry. It must be connected to
1
SGND1
the signal ground plan of the power supply. The signal ground plan and the
power ground plan must be connected together in one point near the PGND
pin.
2 COMP2 DC voltage error compensation pin for the switching section 2
Frequency selection pin. It provides a selectable switching frequency,
3
FSEL
allowing three different values of switching frequencies for the switching
sections.
Enable input for the switching section 2.
– The section 2 is enabled applying a voltage greater than 2.4V to this pin.
4
EN2
– The section 2 is disabled applying a voltage lower than 0.8V.
When the section is disabled the High Side gate driver goes low and Low
Side gate driver goes high. If both EN1 and EN2 pins are low and SHDN pin
is high the device enters in standby mode.
Shutdown control input.
– The device switch off if the SHDN voltage is lower than the device off
thershold (Shutdown mode)
5
SHDN
– The device switch on if the SHDN voltage is greater than the device on
threshold.
The SHDN pin can be connected to the battery through a voltage divider to
program an undervoltage lockout. In shutdown mode, the gate drivers of the
two switching sections are in high impedance (high-Z).
Feedback input for the switching section 2 This pin is connected to a
6 FB2 resistive voltage-divider from OUT2 to PGND to adjust the output voltage
from 0.9V to 3.3V.
7
LDO
Adjustable internal regulator output. It can be set from 0.9V to 3.3V. LDO pin
can provide a 100mA peak current.
8
OUT2
Output voltage sense for the switching section 2.This pin must be directly
connected to the output votage of the switching section.
9
BOOT2
Bootstrap capacitor connection for the switching section 2. It supplies the
high-side gate driver.
10
HGATE2
High-side gate driver ouput for section 2. This is the floating gate driver
output.
11
PHASE2
Switch node connection and return path for the high side driver for the
section 2. It is also used as negative current sense input.
Positive current sense input for the switching section 2. This pin must be
12 CSENSE2 connected through a resistor to the drain of the synchronous rectifier to
obtain a positive current limit threshold for the power supply controller.
13 LGATE2 Low-side gate driver output for the section 2.
14
PGND
Power ground. This pin must be connected to the power ground plan of the
power supply.
15 LGATE1 Low-side gate driver output for the section 1.
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PM6681A
5 Revision history
Table 4. Revision history
Date
Revision
02-Nov-2006
1
Initial release
Revision history
Changes
11/12
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| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet PM6681A.PDF ] | |
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