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FSB50450S 데이터시트 PDF




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부품번호 FSB50450S 기능
기능 smart power module
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FSB50450S 데이터시트, 핀배열, 회로
www.DataSheet4U.com
September 2006
FSB50450S
Smart Power Module (SPM)
Features
• 500V 3.0A 3-phase FRFET inverter including high voltage
integrated circuit (HVIC)
• 3 divided negative dc-link terminals for inverter current sens-
ing applications
• HVIC for gate driving and undervoltage protection
• 3/5V CMOS/TTL compatible, active-high interface
• Optimized for low electromagnetic interference
• Isolation voltage rating of 1500Vrms for 1min.
• Surface mounted device package
• Moisture Sensitive Level 3
General Description
FSB50450S is a tiny smart power module (SPM) based on
FRFET technology as a compact inverter solution for small
power motor drive applications such as fan motors and water
suppliers. It is composed of 6 fast-recovery MOSFET (FRFET),
and 3 half-bridge HVICs for FRFET gate driving. FSB50450S
provides low electromagnetic interference (EMI) characteristics
with optimized switching speed. Moreover, since it employs
FRFET as a power switch, it has much better ruggedness and
larger safe operation area (SOA) than that of an IGBT-based
power module or one-chip solution. The package is optimized
for the thermal performance and compactness for the use in the
built-in motor application and any other application where the
assembly space is concerned. FSB50450S is the most solution
for the compact inverter providing the energy efficiency,
compactness, and low electromagnetic interference.
Absolute Maximum Ratings
Symbol
Parameter
VPN1
VPN2
ID25
ID80
IDP
PD
VCC
DC Link Input Voltage,
Drain-source Voltage of each FRFET
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Continuous
Each FRFET Drain Current, Peak
Maximum Power Dissipation
Control Supply Voltage
VBS High-side Bias Voltage
VIN
TJ
TSTG
Input Signal Voltage
Operating Junction Temperature
Storage Temperature
RθJC Junction to Case Thermal Resistance
VISO Isolation Voltage
Conditions
Rating
TJ = 25°C
TJ = 150°C
TC = 25°C
TC = 100°C
TC = 25°C, PW < 100µs
TC = 25°C, Each FRFET
Applied between VCC and COM
Applied between VB(U)-VS(U), VB(V)-VS(V),
VB(W)-VS(W)
Applied between IN and COM
500
500
1.5
1.0
3.0
14
20
20
-0.3 ~ VCC+0.3
-20 ~ 150
Each FRFET under inverter operating con-
dition (Note 1)
-50 ~ 150
8.9
60Hz, Sinusoidal, 1 minute, Connection
pins to heatsink
1500
Units
V
V
A
A
A
W
V
V
V
°C
°C
°C/W
Vrms
©2006 Fairchild Semiconductor Corporation
FSB50450S Rev. A
1
www.fairchildsemi.com




FSB50450S pdf, 반도체, 판매, 대치품
www.DataSheet4U.com
Recommended Operating Conditions
Symbol
Parameter
Conditions
VPN
VCC
VBS
VIN(ON)
VIN(OFF)
tdead
fPWM
Supply Voltage
Applied between P and N
Control Supply Voltage
High-side Bias Voltage
Input ON Threshold Voltage
Input OFF Threshold Voltage
Applied between VCC and COM
Applied between VB and VS
Applied between IN and COM
Blanking Time for Preventing
Arm-short
VCC=VBS=13.5 ~ 16.5V, TJ 150°C
PWM Switching Frequency TJ 150°C
Min.
-
13.5
13.5
3.0
0
Value
Typ.
300
15
15
-
-
Max.
400
16.5
16.5
VCC
0.6
Units
V
V
V
V
V
1.0 -
- µs
- 15 - kHz
15-V Line
These values depend on PWM
control algorithm
R2
Micom
R1 D1
R5
C5
VCC
HIN
LIN
COM
VB
HO
VS
LO
P VDC
Inverter
Output
C3
N R3
HIN LIN Output
Note
0 0 Z Both FRFET Off
01
0 Low-side FRFET On
1 0 VDC High-side FRFET On
1
1 Forbidden
Shoot-through
10µF
C2 C1
One-Leg Diagram of SPM
Open Open
Z
Same as (0, 0)
* Example of bootstrap paramters:
C1 = C2 = 1µF ceramic capacitor,
R1 = 56Ω, R2 = 20
Note:
(1) It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 600-V rating
(2) Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
(3) RC coupling(R5 and C5) at each input (indicated as dotted lines) may be used to prevent improper input signal due to surge noise. Signal input of SPM is compatible with stan-
dard CMOS or LSTTL outptus.
(4) Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2
and C3 should have good high-frequency characteristics to absorb high-frequency ripple current.
Figure 2. Recommended CPU Interface and Bootstrap Circuit with Parameters
14.50mm
3.80mm
Note:
MOSFET
Case Temperature(Tc)
Detecting Point
Attach the thermocouple on top of the heatsink-side of SPM (between SPM and heatsink if applied) to get the correct temperature measurement.
Figure 3. Case Temperature Measurement
FSB50450S Rev. A
4 www.fairchildsemi.com

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FSB50450S 전자부품, 판매, 대치품
www.DataSheet4U.com
Detailed Package Outline Drawings
Max 1.00
0.60±0.10
(1.165)
15*1.778=26.67±0.30
13.34±0.30
#1
13.34±0.30
#16
15*1.778=26.67
#1
1.30
4.43
2.48
#16
#17
12.23±0.30
13.13±0.30
#23
29.00±0.20
7.80
15.60
LAND PATTERN RECOMMENDATIONS
(2.275)
2x3.90=7.80±0.30
4x3.90=15.60±0.30
1.95
17.00±0.20
0.60±0.10
Max 1.00
GAGE PLANE
SEATING PLANE
(2.50)
5°±3°
1.50±0.20
FSB50450S Rev. A
7 www.fairchildsemi.com

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