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PDF AD7323 Data sheet ( Hoja de datos )
| Número de pieza | AD7323 | |
| Descripción | 12-Bit Plus Sign ADC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
500 kSPS, 4-Channel, Software-Selectable,
True Bipolar Input, 12-Bit Plus Sign ADC
AD7323
FEATURES
12-bit plus sign SAR ADC
True bipolar input ranges
Software-selectable input ranges
±10 V, ±5 V, ±2.5 V, 0 V to +10 V
500 kSPS throughput rate
Four analog input channels with channel sequencer
Single-ended, true differential, and pseudo differential
analog input capability
High analog input impedance
Low power: 18 mW
Full power signal bandwidth: 22 MHz
Internal 2.5 V reference
High speed serial interface
Power-down modes
16-lead TSSOP package
iCMOS process technology
FUNCTIONAL BLOCK DIAGRAM
VDD
REFIN/OUT VCC
AD7323
VIN0
VIN1
VIN2
VIN3
I/P
MUX
2.5V
VREF
T/H
13-BIT
SUCCESSIVE
APPROXIMATION
ADC
CHANNEL
SEQUENCER
AGND
CONTROL LOGIC
AND REGISTERS
VSS DGND
Figure 1.
DOUT
SCLK
CS
DIN
VDRIVE
GENERAL DESCRIPTION
The AD73231 is a 4-channel, 12-bit plus sign successive
approximation analog-to-digital converter (ADC) designed on
the iCMOS™ (industrial CMOS) process. iCMOS is a process
combining high voltage silicon with submicron CMOS and
complementary bipolar technologies. It enables the development
of a wide range of high performance analog ICs capable of 33 V
operation in a footprint that no previous generation of high
voltage parts could achieve. Unlike analog ICs using conven-
tional CMOS processes, iCMOS components can accept bipolar
input signals while providing increased performance, dramati-
cally reduced power consumption, and reduced package size.
The AD7323 can accept true bipolar analog input signals. The
AD7323 has four software selectable input ranges, ±10 V, ±5 V,
±2.5 V, and 0 V to +10 V. Each analog input channel can be
independently programmed to one of the four input ranges.
The analog input channels on the AD7323 can be programmed
to be single-ended, true differential, or pseudo differential.
The ADC contains a 2.5 V internal reference. The AD7323 also
allows for external reference operation. If a 3 V reference is
applied to the REFIN/OUT pin, the AD7323 can accept a true
bipolar ±12 V analog input. Minimum ±12 V VDD and VSS
supplies are required for the ±12 V input range. The ADC has a
high speed serial interface that can operate at throughput rates
up to 500 kSPS.
1 Protected by U.S. Patent No. 6,731,232.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
PRODUCT HIGHLIGHTS
1. The AD7323 can accept true bipolar analog input signals,
±10 V, ±5 V, and ±2.5 V, and 0 V to +10 V unipolar signals.
2. The four analog inputs can be configured as four single-
ended inputs, two true differential input pairs, two pseudo
differential inputs, or three pseudo differential inputs.
3. 500 kSPS serial interface. SPI-/QSPI™-/DSP-/MICROWIRE™-
compatible interface.
4. Low power, 18 mW, at a maximum throughput rate of
500 kSPS.
5. Channel sequencer.
Table 1. Similar Devices
Device Throughput
Number Rate
AD7329 1000 kSPS
AD7328 1000 kSPS
AD7327 500 kSPS
AD7324 1000 kSPS
AD7322 1000 kSPS
AD7321 500 kSPS
Number of bits
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
12-bit plus sign
Number of
Channels
8
8
8
4
2
2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD7323
Data Sheet
Parameter1
DC ACCURACY
B Version
Min Typ Max Unit
Resolution
No Missing Codes
Integral Nonlinearity2
13
12-bit plus
sign (13 bits)
11-bit plus
sign (12 bits)
Differential Nonlinearity2
Offset Error2, 4
Offset Error Match2, 4
Gain Error2, 4
Gain Error Match2, 4
Positive Full-Scale Error2, 5
Positive Full-Scale Error
Match2, 5
Bipolar Zero Error2, 5
Bipolar Zero Error Match2, 5
Negative Full-Scale Error2, 5
Negative Full-Scale Error
Match2, 5
ANALOG INPUT
Input Voltage Ranges
(Programmed via Range
Register)
Pseudo Differential VIN(−)
Input Range
DC Leakage Current
Bits
Bits
Bits
±1.1 LSB
±1 LSB
−0.7/+1.2
LSB
−0.7/+1
−0.9/+1.2
±0.9
LSB
LSB
LSB
−4/+9
−7/+10
±0.6
±0.5
±8
±14
±0.5
±0.5
±4
±7
±0.5
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
±0.5 LSB
±8.5 LSB
±7.5 LSB
±0.5 LSB
±0.5 LSB
±4 LSB
±6 LSB
±0.5 LSB
±0.5 LSB
±10
±5
±2.5
0 to 10
V
V
V
V
±3.5
±6
±5
+3/−5
3
V
V
V
V
±80 nA
nA
Rev. B | Page 4 of 36
Test Conditions/Comments
Single-ended/pseudo differential mode:
1 LSB = FSR/4096; unless otherwise noted
Differential mode: 1 LSB = FSR/8192;
unless otherwise noted
Differential mode
Single-ended/pseudo differential mode
Differential mode; VCC = 3 V to 5.25 V, typ for VCC = 2.7 V
Single-ended/pseudo differential mode, VCC = 3 V to 5.25 V,
typical for VCC = 2.7 V
Single-ended/pseudo differential mode
(LSB = FSR/8192)
Differential mode; guaranteed no missing codes to 13 bits
Single-ended mode; guaranteed no missing codes to 12 bits
Single-ended/pseudo differential mode
(LSB = FSR/8192)
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Single-ended/pseudo differential mode
Differential mode
Reference = 2.5 V; see Table 6
VDD = 10 V min, VSS = −10 V min, VCC = 2.7 V to 5.25 V
VDD = 5 V min, VSS = −5 V min, VCC = 2.7 V to 5.25 V
VDD = 5 V min, VSS = −5 V min, VCC = 2.7 V to 5.25 V
VDD = 10 V min, VSS = AGND min, VCC = 2.7 V to 5.25 V
VDD = 16.5 V, VSS = −16.5 V, VCC = 5 V; see Figure 40 and
Figure 41
Reference = 2.5 V; range = ±10 V
Reference = 2.5 V; range = ±5 V
Reference = 2.5 V; range = ±2.5 V
Reference = 2.5 V; range = 0 V to +10 V
VIN = VDD or VSS
Per input channel, VIN = VDD or VSS
5 Page 
AD7323
TYPICAL PERFORMANCE CHARACTERISTICS
0
4096 POINT FFT
VCC = VDRIVE = 5V
–20 VDD, VSS = ±15V
TA = 25°C
INT/EXT 2.5V REFERENCE
–40 ±10V RANGE
fIN = 50kHz
SNR = 77.30dB
–60 SINAD = 76.85dB
THD = –86.96dB
SFDR = –88.22dB
–80
–100
–120
–140
0
50 100 150 200
FREQUENCY (kHz)
Figure 4. FFT True Differential Mode
250
0
–20
–40
–60
–80
–100
–120
–140
0
4096 POINT FFT
VCC = VDRIVE = 5V
VDD, VSS = ±15V
TA = 25°C
INT/EXT 2.5V REFERENCE
±10V RANGE
fIN = 50kHz
SNR = 74.67dB
SINAD = 74.03dB
THD = –82.68dB
SFDR = –85.40dB
50 100 150 200
FREQUENCY (kHz)
Figure 5. FFT Single-Ended Mode
250
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
VCC = VDRIVE = 5V
TA = 25°C
VDD, VSS = ±15V
INT/EXT 2.5V REFERENCE
±10V RANGE
–0.8 +DNL = +0.72LSB
–DNL = –0.22LSB
–1.0
0 1024 2048 3072 4096 5120 6144 7168 8192
512 1536 2560 3584 4608 5632 6656 7680
CODE
Figure 6. Typical DNL True Differential Mode
Data Sheet
1.0
VCC = VDRIVE = 5V INT/EXT 2.5V REFERENCE
0.8 TA = 25°C
±10V RANGE
VDD, VSS = ±15V +INL = +0.55LSB
0.6 –INL = –0.68LSB
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0 1024 2048 3072 4096 5120 6144 7168 8192
512 1536 2560 3584 4608 5632 6656 7680
CODE
Figure 7. Typical INL True Differential Mode
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
VCC = VDRIVE = 5V
TA = 25°C
VDD, VSS = ±15V
INT/EXT 2.5V REFERENCE
±10V RANGE
+DNL = +0.79LSB
–DNL = –0.38LSB
–1.0
0
1024 2048 3072 4096 5120 6144 7168 8192
512 1536 2560 3584 4608 5632 6656 7680
CODE
Figure 8. Typical DNL Single-Ended Mode
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
VCC = VDRIVE = 5V
TA = 25°C
VDD, VSS = ±15V
INT/EXT 2.5V REFERENCE
–0.8
±10V RANGE
+INL = +0.87LSB
–1.0
0
–INL = –0.49LSB
1024 2048 3072 4096 5120 6144 7168 8192
512 1536 2560 3584 4608 5632 6656 7680
CODE
Figure 9. Typical INL Single-Ended Mode
Rev. B | Page 10 of 36
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD7323.PDF ] | |
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