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IS25C16 데이터시트 PDF




ISSI에서 제조한 전자 부품 IS25C16은 전자 산업 및 응용 분야에서
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부품번호 IS25C16 기능
기능 (IS25C08 / IS25C16) 8K-BIT/16K-BIT SPI SERIAL ELECTRICALLY ERASABLE PROM
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IS25C16 데이터시트, 핀배열, 회로
www.DataSheet4U.com
IS25C08
IS25C16
8K-BIT/16K-BIT SPI SERIAL
ELECTRICALLY ERASABLE PROM
ISSI®
Preliminary Information
APRIL 2006
FEATURES
• Serial Peripheral Interface (SPI) Compatible
— Supports SPI Modes 0 (0,0) and 3 (1,1)
• Wide-voltage Operation
— Vcc = 1.8V to 5.5V
• Low power CMOS
— Active current less than 3.0 mA (2.5V)
— Standby current less than 2.0 µA (2.5V)
• Block Write Protection
— Protect 1/4, 1/2, or Entire Array
• 16 byte page write mode
— Partial page writes allowed
• 10 MHz Clock Rate (5V)
• Self timed write cycles (5 ms Typical)
• High-reliability
— Endurance: 1 million cycles per byte
— Data retention: 100 years
• Industrial and Automotive temperature ranges
• 8-pin PDIP, 8-pin SOIC, 8-pin TSSOP, and chip scale
packages are available
• Lead-free available
DESCRIPTION
The IS25C08 and IS25C16 are electrically erasable
PROM devices that use the Serial Peripheral Interface
(SPI) for communications. The IS25C08 is 8Kbit
(1024x 8) and the IS25C16 is 16Kbit (2048 x 8). The
IS25C08/16 EEPROMs are offered in a wide operating
voltage range of 1.8V to 5.5V compatible with most
application voltages. ISSI designed the IS25C08/16 to
be an efficient SPI EEPROM solution. The devices are
packaged in 8-pin PDIP, 8-pin SOIC, 8-pin TSSOP, and
8-ball CSP.
The functional features of the IS25C08/16 allow them to
be among the most advanced serial non-volatile memo-
ries available. Each device has a Chip-Select (CS) pin,
and a 3-wire interface of Serial Data In (SI), Serial Data
Out (SO), and Serial Clock (SCK). While the 3-wire
interface of the IS25C08/16 provides for high-speed
access, a HOLD pin allows the memories to ignore the
interface in a suspended state; later the HOLD pin re-
activates communication without re-initializing the serial
sequence. A Status Register facilitates a flexible write
protection mechanism, and a device-ready bit (RDY).
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Preliminary Information Rev. 00H
02/23/06
1




IS25C16 pdf, 반도체, 판매, 대치품
IS25C08
IS25C16
ISSI ®
STATUS REGISTER
The status register contains 8-bits for write protection
control and write status. (See Table 1). It is the only
region of memory other than the main array that is
accessible by the user.
Table 1. Status Register Format
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit1 Bit 0
WPEN X X X BP1 BP0 WEN RDY
Notes:
1. X = Don't care bit.
2. During internal write cycles, bits 0 to 7 are temporarily 1's.
The Status Register is Read-Only if either: a) Hardware
Write Protection is enabled or b) WEN is set to 0. If
neither is true, it can be modified by a valid instruction.
Ready (RDY), Bit 0: When RDY = 1, it indicates that
the device is busy with a write cycle. RDY = 0 indi-
cates that the device is ready for an instruction. If RDY
= 1, the only command that will be handled by the
device is Read Status Register.
Write Enable (WEN), Bit 1: This bit represents the
status of device write protection. If WEN = 0, the Status
Register and the entire array is protected from modifica-
tion, regardless of the setting of WPEN, WP pin, or block
protection. The only way to set WEN to 1 is via the
Write Enable command (WREN). WEN is reset to 0
upon power-up.
Block Protect (BP1, BP0), Bits 2-3: Together, these
bits represent one of four block protection configurations
implemented for the memory array. (See Table 2 for
details.)
BP0 and BP1 are non-volatile cells similar to regular
array cells, and factory programmed to 0. The block of
memory defined by these bits is always protected,
regardless of the setting of WPEN, WP , or WEN.
Table 2. Block Protection
Status
Register
Bits
Array Addresses Protected
Level
0
1(1/4)
2(1/2)
3(All)
BP1 BP0
00
01
10
11
IS25C08
None
0300h
-03FFh
0200h
-03FFh
0000h
-03FFh
IS25C16
None
0600h
-07FFh
0400h
-07FFh
0000h
-07FFh
Don’t Care, Bits 4-6: Each of these bits can receive
either 0 or 1, but values will not be retained. When
these bits are read from the register, they are always 0.
Write Protect Enable (WPEN), Bit 7: This bit can be
used in conjunction with WP pin to enable Hardware
Write Protection, which causes the Status Register to
be read-only. The memory array is not protected by this
mode. Hardware Write Protection requires that WP = 0
and WPEN = 1; it is disabled otherwise. Note: WPEN
cannot be changed from 1 to 0 if the WP pin is already
set to Low. (See Table 4 for data protection relationship)
4 Integrated Silicon Solution, Inc. — 1-800-379-4774
Preliminary Information Rev. 00H
02/23/06

4페이지










IS25C16 전자부품, 판매, 대치품
IS25C08
IS25C16
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
VS
VP
TBIAS
TSTG
IOUT
Supply Voltage
Voltage on Any Pin
Temperature Under Bias
Storage Temperature
Output Current
-0.5 to + 6.5
–0.5 to Vcc + 0.5
–55 to +125
–65 to +150
5
V
V
°C
°C
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions outside those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
OPERATING RANGE (IS25C16-2 and IS25C08-2)
Range
Industrial
Ambient Temperature
–40°C to +85°C
VCC
1.8V to 5.5V
Note: ISSI offers Industrial grade for Commercial applications (0oC to +70oC).
OPERATING RANGE (IS25C16-3 and IS25C08-3)
Range
Automotive
Ambient Temperature
–40°C to +125°C
VCC
2.5V to 5.5V
CAPACITANCE(1,2)
Symbol
CIN
COUT
Parameter
Input Capacitance
Output Capacitance
Conditions
VIN = 0V
VOUT = 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters
and not 100% tested.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5.0V.
ISSI ®
Integrated Silicon Solution, Inc. — 1-800-379-4774
Preliminary Information Rev. 00H
02/23/06
7

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