PDF GF9320 Data sheet ( Hoja de datos )

Número de pieza	GF9320
Descripción	Scaling Processor
Fabricantes	Gennum
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No Preview Available ! www.DataSheet4U.com Features • broadcast quality 10 / 8-bit 24-tap poly-phase horizontal and vertical scalar for HDTV / SDTV video images • high performance 2D scaling processor with separate control of horizontal and vertical scaling factors and pan positions • support for arbitrary video formats up to 2048 by 2048 • support for multiplexed and non-multiplexed Y/C video • flexible 4:2:2 or 4:4:4 YCbCr or RGB output • field merge / separation can be inserted / removed from progressive images using interlaced I/O • double banked control registers for 'on-the-fly' dynamic effects • external 3:2 / 2:2 pull-down insertion and extraction • programmable output matrix with 6dB gain range • film rate features include 1080p24 and 1080PsF support • fully programmable colour background generator • flexible F,V,H output and TRS insertion • seamless interface to GF9330 de-interlacer • seamless interface to common SDRAM • user configuration through dedicated serial interface • 3.3V supply Description The GF9320 Scaling Processor offers 10 / 8-bit broadcast quality scaling of video images up to 2048 by 2048 pixels. The GF9320 supports arbitrary display modes to fit custom applications. Dynamic zoom and pan effects allow for a variety of aspect ratio conversion GF9320 Scaling Processor GF9320 Data Sheet choices while a programmable colour background generator can be customized to appropriately match the image content. A fully programmable and flexible output matrix allows for colour difference over-sampling, gain and hue controls as well as YCbCr to RGB conversions to power nearly any display device on the market. The GF9320 also includes a vertical interpolation filter to perform stand alone cost-sensitive de-interlacing. Broadcast quality de-interlacing is offered through a seamless interface to the GF9330 and GF9331 devices. Applications • HDTV Up / Down Converters • Production Equipment • Video Walls • Projection Systems • Plasma Displays • LCD TVs • Home Theatre Systems • HD DVD Players Ordering Information Part Number GF9320-CBW Package 352 pin TBGA Temp. Range 0oC to 70oC YC/Y C Input Processing MUX Horizontal Scaling Filter MUX Input Processing G/Y/YC B/Cb/C R/Cr CTRL Control Interface MUX External Memory Interface 1 Vertical Scaling Filter External Memory Interface 2 Block Diagram Proprietary and Confidential 18090 - 7 November 2004 1 of 60 www.gennum.com 1 page GF9320 Data Sheet Table 1-1: Pin Descriptions (Continued) Symbol DATA_B[19:0] DATA_C[19:0] DATA_D[19:0] ADDR_A[10:0] BA_A ADDR_B[10:0] BA_B ADDR_C[10:0] BA_C ADDR_D[10:0] BA_D CS_A[3:0] CS_B[3:0] CS_C[3:0] CS_D[3:0] RAS_A RAS_B RAS_C RAS_D CAS_A CAS_B CAS_C Pin Grid F25, F24, F23, E26, E25, D26, E23, C26, D24, C25, B26, B25, A26, A25, B24, C23, A24, D22, B23, A23 AE14, AF14, AF13, AE13, AD13, AC13, AF12, AD12, AC12, AF11, AE11, AD11, AC11, AF10, AE10, AF8, AE8, AD8, AC8, AF7 AA24, AA23, AB26, AB25, AC26, AC25, AB23, AD26, AC24, AD25, AE26, AF26, AE25, AF25, AE24, AD23, AF24, AC22, AE23, AF23 A3, C4, B3, A2, B2, A1, B1, C2, D3, C1, E4 D5 D18, C18, B18, B17, A17, D16, C16, B16, A16, D15, C15 A19 AD4, AE3, AF2, AF1, AE2, AE1, AD2, AC3, AD1, AB4, AC2 AF3 AD18, AE18, AF18, AE17, AF17, AC16, AD16, AE16, AF16, AC15, AD15 AC18 D6, A5, B5, A4 A22, D21, C21, B21 AE5, AF4, AD5, AE4 AC21, AD21, AE21, AF21 C6 B19 AD6 AE19 B6 C19 AC6 Type Description I/O Data bus for memory array B. I/O Data bus for memory array C. I/O Data bus for memory array D. O Address bus for memory array A. O SDRAM bank select for memory array A. O Address bus for memory array B. O SDRAM bank select pin for memory array B. O Address bus for memory array C. O SDRAM bank select pin for memory array C. O Address bus for memory array D. O SDRAM bank select pin for memory array D. O Chip select for memory array A. O Chip select for memory array B. O Chip select for memory array C. O Chip select for memory array D. O Row address strobe for memory array A. O Row address strobe for memory array B. O Row address strobe for memory array C. O Row address strobe for memory array D. O Column address strobe for memory array A. O Column address strobe for memory array B. O Column address strobe for memory array C. Proprietary and Confidential 18090 - 7 November 2004 5 of 60 5 Page 3. Detailed Device Description GF9320 Data Sheet 3.1 Device Overview A system level block diagram is shown in the “Block Diagram” on page 1. 2D scaling is performed by cascading two 1D-scaling filters. If the number of horizontal input samples is greater than the number of horizontal output samples (i.e. down sampling), then it is advantageous to perform horizontal resizing first. Otherwise, horizontal resizing is performed last. This minimizes the number of operations required, reduces the intermediate image size and thus lowers the SDRAM requirements. In addition, the SDRAMs are used for field merge or separation operations to perform simple frame rate conversions (e.g. 30 ↔ 60 and 48 ↔ 60) for film applications. This minimizes the on chip memory required to perform 2D format conversion for low-cost, high-quality format conversion. The GF9320 has 2 fields / frames of delay depending on the selected operating mode. Processing is performed simultaneously on 3 fields / frames. Input processing is performed on field / frame N, vertical processing is performed on field / frame (N- 1) and output processing is performed on field / frame (N-2). The input processor decodes the input TRS to determine input video timing information. An area of the input video is selected according to the downloaded parameters. The input video is resized horizontally if down sampling is indicated. The video is passed to picture memory control #1 and stored in SDRAM. Field / frame (N-1) is read out of picture memory #1, processed vertically, and stored in picture memory #2. To process the video vertically the read address to picture memory #1 transposes the video data while the write address to picture memory #2 transposes the video data back. This transpose operation allows the vertical processing to be done as rows instead of columns. Field / frame (N-2) is read out of picture memory #2 and resized horizontally if up sampling is indicated. The flexible output processor can be selected to perform 4:2:2 to 4:4:4 colour difference over sampling, YCbCr to RGB conversion, colour background insertion and output TRS insertion. Proprietary and Confidential 18090 - 7 November 2004 11 of 60 11 Page

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