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부품번호 NX26F041A 기능
기능 (NX26F011A / NX26F041A) 1M-BIT AND 4M-BIT SERIAL FLASH MEMORY
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NX26F041A 데이터시트, 핀배열, 회로
www.DataSheet4U.com
NX26F011A
NNXX262F064F1A011A
NX26F041A
1M-BIT AND 4M-BIT SERIAL FLASH MEMORY
WITH 2-PIN NXS INTERFACE
1PRE-RELEASE
MAY 1999
FEATURES
• Tailored for Portable and Mobile Media-Storage
– Ideal for portable/mobile applications that transfer
and store data, audio, or images
– Removable Serial Flash Module package option
NexFlash ™ Non-volatile Memory Technology
– Patented Single-Transistor EEPROM Cell
– High-density, cost-effective, low-voltage/power
– 10K/100K endurance, ten years data retention
• Flash Memory for Battery-Operation
– Single 5V or 3V supply for Read, Erase/Write
– Icc 5 mA active with 1 µA standby power
– 5 ms Erase/Write times for efficient battery use
2
• 1M-bits or 4M-bits of NexFlash Serial Memory
– 512 or 2,048 sectors of 264 bytes each
– Simple commands: Reset, Read, Write,
Ready/Busy
– No pre-erase required, auto-erases before write
• Two-pin NXS Serial Interface
– Saves Microcontroller-pins, simplifies PCB layout,
low switching noise compared to parallel Flash
– Supports clock operation as fast as 16 MHz
– Multi-device cascading, up to 16 devices
3
4
5
• Development Tools and Accessories
– SFK-NXS Serial Flash Development Kit
6
7
Description
The NexFlashNX26F011A and NX26F041A Serial Flash
Memories are tailored for portable/mobile media-storage
applications that transfer and store data, audio and images.
Manufactured using NexFlashs patented single transistor
EEPROM memory cell, the NX26F011A and NX26F041A
provide a high-density, low-voltage, low-power, and cost
effective solution for battery-operated nonvolatile data
storage requirements. The NX26F011A and NX26F041A
can operate with a single 5V or 3V supply for Read, Write,
and Erase. Power consumption is very low due to µA
standby current and fast Erase/Write performance (as fast
as 5 ms per sector) that minimizes power-on time, resulting
in a highly efficient energy-per-transfer ratio. The NX26F011A
8
9and NX26F041A offer 1M-bits and 4M-bits of Flash memory
organized in sectors of 264 bytes each. Each sector is
individually addressable through basic commands or
control functions such as Reset, Read, Erase/Write, and
10Ready/Busy. The NXS (NexFlash Serial) 2-wire serial
interface is ideal for use with microcontrollers since it only
requires two pins. This leaves pins normally used for parallel
Flash free for other uses. The NXS interface supports clock
11ratesasfastas16MHzandallowsformulti-device cascading
of up to 16 devices. It also simplifies PC-board layout and
generates less transient noise than parallel devices. Devel-
opment is supported with the NexFlash Serial Flash
Development Kit.
12
This document contains PRELIMINARY INFORMATION. NexFlash reserves the right to make changes to its product at any time without notice in order to improve design and supply the
best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright 1998, NexFlash Technologies, Inc.
NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
05/05/99 ©
1




NX26F041A pdf, 반도체, 판매, 대치품
NX26F011A
NX26F041A
The instruction sequence format, flow charts, and clocking
diagrams for Read and Erase/Write operations are shown in
Figures 5 and 6, Figures 7 and 8, and Figures 9 and 10,
respectively. All data within an instruction sequence is
clocked on the rising edge. All instruction sequence fields are
ordered by most significant bit first (MSB). Data is erased and
written to the NX26F041A and NX26F011A memory array a
full sector (264 bytes) at a time. If all 264 bytes of a given
sector are not fully clocked into the device, the remaining
byte locations will be overwritten with indeterminate values.
To ensure the highest level of data integrity write operations
should be verified and rewritten, if needed, (see High Data
Integrity Applications).
Reset and Idle
Upon power-up and between Read and Erase/Write instruc-
tion sequences, the devices internal control logic will be
reset. This is accomplished by asserting the SCK pin low
(to VIL) for greater than tRESET (~5 ms to 10 ms depending on
the voltage version being used). Once reset, the device
enters standby operation and will not wake-up until the next
rising edge of SCK. After an initial rising SCK occurs, the
device becomes ready for a new instruction sequence. Full
active power consumption starts after the correct device
address is decoded during a Read or Write instruction
sequence. To idle an instruction sequence between clocks,
SCK must be kept high (at VIH) for as long as needed. Note
that power will be in the active state when SCK is held high.
Device Initialization
After power-up it is recommended that the device information
sector be read to electronically identify the device. The
device information format contains a device ID that identifies
the manufacturer, part number (memory size), and operating
range. It also contains a list of any restricted sectors
(see Sector Tag/Sync bytes). For a further description of the
NX26F011A and NX26F041A device information format, see
the Serial Flash Device Information Sector Application Note
SFAN-02.
As shown in Figure 6, the address for the device information
sector address is at 5000H for both the NX26F011A and
NX26F041A. The device information sector is a read-only
sector. This assures that all device specific information,
such as the restricted sector list, is maintained and never
written over inadvertently.
Ready/Busy Status
After an Erase/Write instruction sequence has been
executed, the device will become Busy while it erases and
writes the addressed sectors memory. This period of time
will not exceed tWP (~5 to 30 ms based on the specified power
supply operating voltage). During this time the device can be
tested for a Ready/Busy condition via a 16-bit status value
obtained in the Read instruction sequence. The Busy status
condition (6666H) indicates that the device has not yet
completed its write operation and will not accept read or write
instructions. The Ready status condition (9999H) indicates
that the device is available for further read or write operations.
Note that a delay time of tRP (~30 µs to 100 µs depending on
the voltage version being used) is required after the first low
to high clock transition of the Ready/Busy status read.
Sector Tag/Sync Bytes
The first byte of each sector is pre-programmed during
manufacturing with a Tag/Sync value of C9H. Although the
first byte of each sector can be changed, it is recommended
that Tag/Sync value be maintained and incorporated as part
of the applications sector formatting. The Tag/Sync values
serve two purposes. First, they provide a sync-detect that
can help verify if the instruction sequence was clocked into
the device properly. Secondly, they serve as a tag to identify
a fully functional (valid) sector. This is especially important
if restricted sectordevices are used.
Restricted sector devices provide a more cost effective
alternative to NX26F011A or NX26F041A devices with 100%
valid sectors. Restricted sector devices have a limited
number of sectors (32 maximum. for the NX26F011A and
NX26F041A) that do not meet manufacturing programming
criteria over the specified operating range. When such a
sector is detected, the first byte is tagged with a pattern other
than C9H. In addition to individual sector tagging, all
restricted sectors for a given device are listed in the device
information format(see Device Initialization).
High Data Integrity Applications
Data storage applications that use Flash memory or other
non-volatile media must take into consideration the possibil-
ity of noise or other adverse system conditions that may
affect data integrity. For those applications that require higher
levels of data integrity it is a recommended practice to use
Error Correcting Code (ECC) techniques. The NexFlash
Serial Flash Development Kit provides a software routine for
a 32-bit ECC that can detect up to two bit errors and correct
one. The ECC not only minimizes problems caused by
system noise but can also extend Flash memory endurance.
For those systems without the processing power to handle
ECC algorithms, a simple verification after writeis recom-
mended. The NexFlash Serial Flash Development Kit
software includes a simple Write/Verify routine that will
compare data written to a given sector and rewrite the sector
if the compare is not correct.
4 NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
05/05/99 ©

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NX26F041A 전자부품, 판매, 대치품
NX26F011A
NX26F041A
Start Sector Read Routine
Output clock (low to high) to
wake device from standby
Output Command Sequence:
-Read command C3-C0 (0001B)
-Main Sector Address A1-A0
(000-1FF-7FF)
-Device Address DA3-DA0
(per state of A3, A2, A1, A0 pins)
-Auxilary Address A15-A12
0H for main array
5H device information sector
-Four reserved bytes R31-R0
(00 00 00 00H)
Input Ready/Busy Status S15-S0.
Note tRP delay time is
required during status read
(See AC Timing and Figure 10)
Ready?
(99 99H)
Yes
Input first byte of data
(Tag/Sync) from sector
No*
Valid Sector?
(C9H)
Yes
No*
Return to write routine?
No
Input remaining 264 bytes of
sector data (2112 bits)
Yes*
*Set Flag and process
accordingly upon return
Assert CLK low for tRESET to
reset device and invoke standby
Return
Start Sector Erase/Write Routine
Call Read Sector Routine to
check Ready/Busy and Tag
Device
Ready and Sector
Tag valid
Yes
Output one clock to wake
device from stand-by
No*
Output Command Sequence:
-Read command C3-C0 (0001B)
-Main Sector Address A1-A0
(000-1FF-7FF)
-Device Address DA3-DA0
(per state of A3, A2, A1, A0 pins)
-Auxilary Address A15-A12
0H for main array
-Four reserved bytes R31-R0
(00 00 00 00H)
Output (Rewrite )1st byte of sector
with C9H Tag/Sync bite
Output remaining 264 bytes
(2112 bits) of sector data
Output two bytes of zeros (00 00H)
Assert CLK low for tRESET
to invoke Erase/Write Operation
and then standby operation
*Set Flag and process
accordingly upon return
Return (1)
1
2
3
4
5
6
7
8
9
10
11
12
Figure 7. Sector Read Operation Flow Chart
Figure 8. Sector Erase/Write Operation Flow Chart
Note:
1. To ensure higher data integrity verify each sector write with a sector read. See High Data Integrity Applications on Page 4.
NexFlash Technologies, Inc.
PRELIMINARY NXSF009A-0599
05/05/99 ©
7

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NX26F041A

(NX26F011A / NX26F041A) 1M-BIT AND 4M-BIT SERIAL FLASH MEMORY

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