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PDF ADCMP609 Data sheet ( Hoja de datos )
| Número de pieza | ADCMP609 | |
| Descripción | (ADCMP608 / ADCMP609) Single-Supply TTL/CMOS Comparators | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Rail-to-Rail, Fast, Low Power, 2.5 V to 5.5 V,
Single-Supply TTL/CMOS Comparators
Preliminary Technical Data
ADCMP608/ACMP609
FEATURES
10 mV sensitivity rail to rail at VCC = 2.5 V
Input common-mode voltage from −0.2 V to VCC + 0.2 V
Low glitch CMOS-/TTL-compatible output stage
30 ns propagation delay
1 mW at 2.5 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection >60 dB
−40C° to +125C° operation
APPLICATIONS
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current-/voltage-controlled oscillators
FUNCTIONAL BLOCK DIAGRAMS
NONINVERTING
INPUT
INVERTING
INPUT
+
ADCMP608
–
Q OUTPUT
NONINVERTING
INPUT
INVERTING
INPUT
SDN
+
ADCMP609
–
Q OUTPUT
Q OUTPUT
LE/HYS SDN
Figure 1.
GENERAL DESCRIPTION
The ADCMP608 and ADCMP609 are fast comparators
fabricated on Analog Devices’ proprietary XFCB2 process.
These comparators are exceptionally versatile and easy to use.
Features include an input range from VEE − 0.5 V to VCC + 0.5 V,
low noise, TTL-/CMOS-compatible output drivers, and latch
inputs with adjustable hysteresis and/or shutdown inputs.
The devices offer 30 ns propagation delays driving a 15 pF load
with 5 mV overdrive on 350/400 μA typical supply current. A
flexible power supply scheme allows the devices to operate with
a single +2.5 V positive supply and a −0.5 V to +3.0 V input
signal range up to a +5.5 V positive supply with a −0.5 V to +6V
input signal range. Split input/output supplies, with no
sequencing restrictions on the ADCMP609, support a wide
input signal range while allowing independent output swing
control.
The TTL-/CMOS-compatible output stage is designed to drive
up to 15 pF with full rated timing specs and to degrade in a
graceful and linear fashion as additional capacitance is added.
The comparator input stage offers robust protection against
large input overdrive, and the outputs do not phase reverse
when the valid input signal range is exceeded. High speed latch
and programmable hysteresis features are also provided in a
unique single-pin control option.
The ADCMP608 is available in a tiny 6-lead SC70 package with
single-ended output and a shutdown pin.
The ADCMP609, available in an 8-lead MSOP package, features
a shutdown pin, single pin latch, and hysteresis control.
+
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
Supply Voltages
Input Supply Voltage (VCCI to GND)
Output Supply Voltage
(VCCO to GND)
Positive Supply Differential
(VCCI − VCCO)
Input Voltages
Input Voltage
Differential Input Voltage
Maximum Input/Output Current
−0.5 V to +6.0 V
−0.5 V to +6.0 V
−6.0 V to +6.0 V
−0.5 V to VCCI + 0.5 V
±(VCCI + 0.5 V)
±50mA
Shutdown Control Pin
Applied Voltage (HYS to GND)
−0.5 V to Vcco + 0.5 V
Maximum Input/Output Current
Latch/Hysteresis Control Pin
Applied Voltage (HYS to GND)
Maximum Input/Output Current
±50 mA
−0.5 V to VCCO + 0.5 V
±50 mA
Output Current
±50 mA
Temperature
Operating Temperature, Ambient
Operating Temperature, Junction
Storage Temperature Range
−40°C to +125°C
150°C
−65°C to +150°C
ADCMP608/ADCMP609
Stress above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type
ADCMP608 SC70 6-lead
ADCMP609 MSOP 8-lead
θJA 1
426
130
Unit
°C/W
°C/W
1 Measurement in still air.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrA | Page 5 of 16
5 Page 
Preliminary Technical Data
The hysteresis control pin appears as a 1.25 V bias voltage seen
through a series resistance of 7k ± 20% throughout the
hysterisis control range. The advantages of applying hysteresis
in this manner are improved accuracy, improved stability,
reduced component count, and maximum versatility. An
external bypass capacitor is not recommended on the HYS pin
because it would likely degrade the jitter performance of the
device and impair the latch function. As described in
Using/Disabling the Latch Feature, hysteresis control need not
compromise the latch function.
Figure 17. Hysteresis vs. RHYS Control Resistor
ADCMP608/ADCMP609
CROSSOVER BIAS POINT
Rail-to-rail inputs of this type, in both op amps and compara-
tors have a dual front-end design. Certain devices are active
near the VCC rail and others are active near the VEE rail. At some
predetermined point in the common-mode range, a crossover
occurs. At this point, normally VCC/2, the direction of the bias
current reverses and there are changes in measured offset
voltages and currents.
With VCC less than 4 V, this crossover is at the expected VCC/2,
but with VCC greater than 4 V, the crossover point instead
follows VCC 1:1, bringing it to approximately 3 V with VCC at
5 V. This means that the comparator input characteristics will
more closely resemble the inputs of non rail-to rail ground
sensing comparators such as the AD8611.
MINIMUM INPUT SLEW RATE REQUIREMENT
(Remove if device is stable.)
As with most high speed comparators, without hysteresis a
minimum slew rate must be met to ensure that the device does
not oscillate as the input signal crosses the threshold. This
oscillation is due to the high gain bandwidth of the comparator
in combination with feedback parasitics inherent in the package
and PC board. A minimum slew rate of TBD. V/μs ensures
clean output transitions from the ADCMP608/ADCMP609
comparators without hysteresis. In many applications,
chattering is not harmful.
Rev. PrA | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet ADCMP609.PDF ] | |
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