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PDF CS51220 Data sheet ( Hoja de datos )
| Número de pieza | CS51220 | |
| Descripción | Feed Forward Voltage Mode PWM Controller | |
| Fabricantes | ON Semiconductor | |
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CS51220
Feed Forward Voltage
Mode PWM Controller
with Programmable
Synchronization
CS51220 is a single output PWM Controller with switching
frequency up to 500 kHz. The feed forward voltage mode control
provides excellent line regulation for wide input range. This PWM
controller has a synchronization output allowing programmable phase
delay. For overcurrent protection, the “soft hiccup” technique
effectively limits the output current with maximum flexibility. In
addition, this device includes such features as: soft start,
pulse−by−pulse current limit, programmable foldback current limit,
volt−second clamping, maximum duty cycle, overvoltage and
undervoltage protection, and synchronization input. The CS51220 is
available in 16 SO narrow surface mount package.
Features
• Constant Frequency Feed Forward Voltage Mode Control
• Programmable Pulse by Pulse Overcurrent Limit
• Programmable Foldback Overcurrent Limit with Delay
• Soft Hiccup Overcurrent Protection with Programmable Foldback
• Frequency Synchronization Output with Programmable Phase Delay
• Synchronization Input to Higher or Lower Frequency
• Direct Connection to External Opto Isolators
• Logic Gate Output Signal
• Accurate Volt−Second Clamping
• Programmable Soft Start
• Logic Input to Disable IC
• Line Overvoltage and Undervoltage Monitoring
• 3.3 V 3% Reference Voltage Output
http://onsemi.com
16
1
SO−16
D SUFFIX
CASE 751B
PIN CONNECTIONS AND
MARKING DIAGRAM
1
VO
GND
VCC
VREF
ISET
ISENSE
OV
UV
16 SYNCO
VSD
SS
COMP
FF
DISABLE
SYNCI
CT
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
CS51220ED16
SO−16
48 Units/Rail
CS51220EDR16
SO−16 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2006
July, 2006− Rev. 7
1
Publication Order Number:
CS51220/D
1 page  
CS51220
ELECTRICAL CHARACTERISTICS (continued) (−40°C < TA < 85°C; −40°C < TJ < 125°C; 4.7 V < VCC < 16 V; CT = 390 pF; unless
otherwise specified.)
Characteristic
Test Conditions
Min Typ
Max Unit
Output (continued)
High Saturation Voltage
Low Saturation Voltage
Pull Down Resistance
Rise Time
Fall Time
Feed Forward
VCC − VO, VCC = 10 V, ISOURCE = 100 μA
VO − GND, ISINK = 100 μA
ISINK = 100 μA
VCC = 10 V, 1.0 V < VO < 6.0 V; 50 pF load
VCC = 10 V, 1.0 V < VO < 6.0 V; 50 pF load
− 1.4
− 0.7
25 50
− 35
− 25
2.0 V
1.0 V
75 kΩ
80 ns
50 ns
Discharge Voltage
Discharge Current
IFF = 2.0 mA
FF = 1.0 V
0.25 0.35
2.0 10
0.45 V
30 mA
FF to VO Delay
FF Clamp Voltage
Connect VO to FF, Measure min. pulse width.
−
50
1.15
75
1.3
150 ns
1.45 V
COMP Switch Off Voltage
VFF = 0.2 V, Ramp down VCOMP
VFF = 0.2 V, Ramp down VCOMP −40°C
0.8 1.4 1.7 V
1.4 1.6 1.7 V
Overcurrent Protection
Overcurrent Comparator DC Offset
−
180 200
215 mV
ISENSE Attenuation
ISENSE Input Resistance
ISENSE to GATE Delay
ISET Foldback Sink Current
External Voltage Monitors
ΔVISET/ΔVISENSE
ΔVISENSE = 0 V
VISET = 0.5 V
ISET = 0.5 V, SS = 1.5 V and ISENSE = 0.5 V
0.9 0.94 0.98 V/V
40 82 150 kΩ
50 100 175 ns
12 15
18 μA
Overvoltage Threshold
OV pin increasing
1.9 2.0 2.1 V
OV Hysteresis Current
OV = 2.15 V
10 12.5 15 μA
Undervoltage Threshold
UV pin decreasing
0.95 1.00
1.05
V
UV Hysteresis
− 25 75 125 mV
Soft Start
Charge Current
SS = 1.5 V
35 50
65 μA
Discharge Current
SS = 1.5 V, UV = 1.5 V
4.0 5.0
7.0 μA
OC Delay Discharge Current
SS Clamp Voltage
SS = 2.85 V, ISET = 0.5, ISENSE = 0.5 V
−
35 50
2.7 2.9
65 μA
3.1 V
Discharge Voltage
− 0.25 0.3 0.35 V
Soft Start Fault Voltage
OV = 2.5 V or UV = 0.85 V
− 0.1 0.2 V
Hiccup Delay Discharge Voltage
− 0.08 0.1 0.12 V
Disable
DISABLE Input Threshold
− 1.0 2.0 3.0 V
DISABLE Input Resistance
DISABLE Operation Current, Low VCC
DISABLE Operation Current, High VCC
VDISABLE = 0.5 V
4.7 V < VCC < 10 V
10 V < VCC < 16 V
50 150 250 kΩ
− − 800 μA
−
−
1600
μA
http://onsemi.com
5
5 Page 
CS51220
The effect of the soft hiccup can be observed in Figure 9,
which shows the output voltage as load increases. The output
is maintained at the regulation value of 5.0 V until it goes into
current limit. At the point of overcurrent inception (A), the
current limit level changes to a lower level (B). The
switchback to a lower current limit level can be seen as the
bottom curve in Figure 9.
6
A
5
4
3
The middle trace is a digitizing ‘scope trace of the current
sense line. The scope interprets the voltages as an average
voltage. This voltage is actually a narrow duty cycle peak
voltage representing the peak current level in the switching
transistor. The actual peak voltages can be seen in the Figure
11. The peaks are 0.85 V at full load, reducing to 0.6 V peak
at the reduced short circuit level. The 1.1 V peak is the full
short circuit current while SS ramps back up. The 0.32 V level
is the normal load resistance, while ISET is still on. The 1.0 V
surge is created by ramp up into a normal 5.0 A load and
followed by the 0.85 V at normal load.
Peak Detect Setting
2
1B
0
02 46
Load Current (A)
Figure 9. Overcurrent In a 5.0 V Output
Converter Using Soft Hiccup
A typical overload scenario is shown in Figure 10. The top
trace is the voltage on the Soft Start (SS) pin. The initial high
discharge rate can be seen transitioning to a 40 ms discharge
period. During this period the ISET establishes a lower
current limit level. The bottom trace shows the output
current. The initial current spike is the output capacitors
discharging. The next level around 4.0 A is the short circuit
current level set by the ISET current. The output then turns
off allowing the current to reduce to a level that does not
cause overcurrent pulses. This releases the SS pin to ramp
back up. During ramp up, the output is still shorted as noted
by the 8.0 A current level. When SS reaches the 2.9 V level,
the short is again recognized and ISET is turned back on
shifting the short circuit current level.
Figure 10. Over−Load Current and
Soft Start Waveforms
Figure 11. Over−Load Current and
ISENSE Voltage
Oscillator and Synchronization
The switching frequency is programmable through a
capacitor connected to the CT pin. When the CT pin voltage
reaches peak voltage (2.0 V), the internal discharge current
discharges the CT capacitor and VO stays low. When the CT
voltage declines to valley voltage (0.9 V), the current source
toggles to charge current and ramps up the CT pin. This starts
a new switching cycle. The duty cycle of the oscillator
determines the maximum PWM duty cycle.
The switching frequency of the IC can be synchronized to
an external frequency presented to the SYNCI pin. When
pulses with amplitude over SYNCI input threshold are
detected, the CT pin immediately ramps down the external
capacitor and the VO pin is forced low. A new switching
cycle begins when the CT pin reaches valley voltage. During
synchronization, the oscillator charge current is reduced by
80 μA, while discharge current is increased by 80 μA. This
effectively slows down the internal oscillator to avoid any
race condition with the sync frequency. As a result, the sync
frequency can be either higher or lower than the internal
oscillator frequency. CS51220 is able to synchronize up to
500 kHz and down to 25% below CT frequency. The
maximum duty cycle clamp is raised to 92% in
synchronization mode. The original oscillator frequency is
restored upon the removal of sync pulses.
http://onsemi.com
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet CS51220.PDF ] | |
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