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PDF DTA124EM3T5G Data sheet ( Hoja de datos )
| Número de pieza | DTA124EM3T5G | |
| Descripción | Digital Transistors (BRT) PNP Silicon Surface Mount Transistors | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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DTA114EM3T5G Series
Preferred Devices
Digital Transistors (BRT)
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The digital transistor
contains a single transistor with a monolithic bias network consisting
of two resistors; a series base resistor and a base−emitter resistor. The
digital transistor eliminates these individual components by
integrating them into a single device. The use of a digital transistor can
reduce both system cost and board space. The device is housed in the
SOT−723 package which is designed for low power surface mount
applications.
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• The SOT−723 Package can be Soldered using Wave or Reflow.
• Available in 4 mm, 8000 Unit Tape & Reel
• These are Pb−Free Devices
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
VCBO
VCEO
IC
50
50
100
Unit
Vdc
Vdc
mAdc
http://onsemi.com
PNP SILICON
DIGITAL
TRANSISTORS
PIN 1
BASE
(INPUT)
R1
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
3
1
2
SOT−723
CASE 631AA
Style 1
MARKING
DIAGRAM
XX M
xx = Specific Device Code
(See Marking Table on page 2)
M = Date Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2004
February, 2004 − Rev. 0
1
Publication Order Number:
DTA114EM3/D
1 page  
1
IC/IB = 10
0.1
DTA114EM3T5G Series
TYPICAL ELECTRICAL CHARACTERISTICS − DTA114EM3T5G
1000
TA = −25°C
75°C
25°C
100
VCE = 10 V
TA = 75°C
25°C
−25°C
0.01
0
20 40
IC, COLLECTOR CURRENT (mA)
50
10
1
10
IC, COLLECTOR CURRENT (mA)
100
Figure 2. VCE(sat) versus IC
Figure 3. DC Current Gain
4 100 75°C 25°C
f = 1 MHz
3
lE = 0 V
TA = 25°C
10
TA = −25°C
1
2
0.1
1
0.01 VO = 5 V
0
0
10
20
30 40
50
0.001
0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (VOLTS)
Vin, INPUT VOLTAGE (VOLTS)
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
100
VO = 0.2 V
10
1
TA = −25°C
75°C
25°C
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage versus Output Current
http://onsemi.com
5
5 Page 
DTA114EM3T5G Series
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE A
−X−
D
b1
3
12
−Y−
E
A
L HE
b 2X
e 0.08 (0.0032) X Y
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.45 0.50 0.55 0.018 0.020 0.022
b 0.15 0.20 0.27 0.0059 0.0079 0.0106
b1 0.25 0.3 0.35 0.010 0.012 0.014
C 0.07 0.12 0.17 0.0028 0.0047 0.0067
D 1.15 1.20 1.25 0.045 0.047 0.049
E 0.75 0.80 0.85 0.03 0.032 0.034
e 0.40 BSC
0.016 BSC
H E 1.15 1.20 1.25 0.045 0.047 0.049
L 0.15 0.20 0.25 0.0059 0.0079 0.0098
SOLDERING FOOTPRINT*
0.40
0.0157
0.40
0.0157
1.0
0.039
0.40
0.0157
0.40
0.0157
0.40
0.0157
ǒ ǓSCALE 20:1
mm
inches
SOT−723
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet DTA124EM3T5G.PDF ] | |
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