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NB4N441 데이터시트 PDF




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부품번호 NB4N441 기능
기능 3.3V Serial Input MultiProtocol PLL Clock Synthesizer
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NB4N441 데이터시트, 핀배열, 회로
NB4N441
3.3V Serial Input
MultiProtocol PLL Clock
Synthesizer, Differential
LVPECL Output
Description
The NB4N441 is a precision clock synthesizer which generates a
differential LVPECL clock output frequency from 12.5 MHz to
425 MHz. A Serial Peripheral Interface (SPI) is used to configure the
device to produce one of sixteen popular standard protocol output
frequencies from a single 27 MHz crystal reference. The NB4N441
also has the added feature of allowing application specific output
frequencies from 12.5 MHz to 425 MHz using crystals within the
range of 10 MHz to 28 MHz.
Features
Performs Precision Clock Generation and Synthesis from a Single
27 MHz Crystal Reference
Serial Load Capability for Proprietary Frequencies
Flexible Input Allows for External Clock Reference
Exceeds Bellcore and ITU Jitter Generation Specification
PLL Lock Detect Output
Output Enable
Fully Integrated PhaseLockLoop with Internal Loop Filter
Operating Range: VCC = 3.135 V to 3.465 V
Small Footprint 24 Pin QFN
These are PbFree Devices*
LOCKED
27 MHz
XTAL
OSC
B
R
FB
Feedback
Divider
SDATA
SCLOCK
SLOAD
Frequency Control Logic
Serial Load
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QFN24
MN SUFFIX
CASE 485L
MARKING
DIAGRAM*
24
1 NB4N
441
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
OUTDIV
B2, 4, 8,
16, 32
CLKOUT
CLKOUT
OE
VCC 2 V
Figure 1. Simplified Block Diagram
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2011
April, 2011 Rev. 2
1
Publication Order Number:
NB4N441/D




NB4N441 pdf, 반도체, 판매, 대치품
NB4N441
Table 2. STANDARD PROTOCOL / OUTPUT FREQUENCY SELECT TABLE WITH 27 MHz CRYSTAL REFERENCE
Input Prescaler PLL FB Divider Output Frequency Divider
#
Protocol
CLKOUT (MHz) Divider P[4:0]
M[9:0]
OUTDIV N[2:0]
0 OC3 /STM1
155.52
11001
1001000000
010
0 OC12 / STM4
155.52
11001
1001000000
010
0 OC48 / STM16
155.52
11001
1001000000
010
1 ETR
32
11011
1000000000
100
2 OC1
51.84
11001
1100000000
100
3 Fast Ethernet
50
11011
1100100000
100
3 ESCON
50
11011
1100100000
100
4 FDDI
125
11011
0111110100
010
4 Infiniband
125
11011
0111110100
010
4 Gigabit Ethernet
125
11011
0111110100
010
4 PCIe
125
11011
0111110100
010
5 1/8 Fibre Channel
13.28125
11011
0110101001
101
6 1/4 Fibre Channel
26.5625
11011
1101010010
101
7 1/2 Fibre Channel
53.125
11011
1101010010
100
8 Fibre Channel
106.25
11011
1101010010
011
9 General
150
11011
1001011000
010
10 D1 Video
69
11011
1000101000
011
11 SONET Reference
19.44
11001
1001000000
101
12 2x Fibre Channel
212.5
11011
1101010010
010
13 4x Fibre Channel
425
11011
1101010010
001
14 XAUI
156.25
11011
1001110001
010
15 Serial ATA
100
11011
1100100000
011
16 HDTV
74.25
11011
1001010010
011
17 HDTV
148.50
11011
1001010010
010
Table 3. NDIVIDER TABLE
N2 N1
00
00
01
01
10
10
11
11
N0
0
1
0
1
0
1
0
1
N Divider
na
B2
B4
B8
B16
B32
na
na
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NB4N441 전자부품, 판매, 대치품
NB4N441
APPLICATIONS INFORMATION
General
The NB4N441 is a precision clock synthesizer which
generates a differential LVPECL clock output frequency
from 12.5 MHz to 425 MHz. A threewire SPI interface is
used to configure the device to produce the exact frequency
of one of sixteen predefined popular standard protocol
output frequencies from a single 27 MHz crystal reference;
see Table 1. This serial interface gives the user complete
control of each internal counter/divider.
If a different or custom output frequency is required, the
SPI interface can also enable the user to configure the device
for frequencies not specified in Table 1.
Input Clock / Crystal Functionality
To generate the exact protocol frequencies in Table 1, a
27.000 MHz frequency source is required. This can be
accomplished by connecting a 27.000 MHz crystal across
the XTAL1 and XTAL2 pins. If driving single ended, use the
XTAL1 pin and leave XTAL2 floating. The CLK/XTAL1
input will accept a LVTTL/LVCMOS input.
Frequency Control Logic Configuration
The NB4N441 includes a 5bit input prescaler, a 10bit
divider for the PLL feedback path and a 3bit Output
Divider, which divides the VCO frequency by 2, 4, 8, 16, or
32. The Frequency Control Logic for the NB4N441
configures these dividers and counters through the
Serial inputs and will select one of the sixteen
predetermined clock frequencies in Table 1. The serial
interface can also be used to configure the device for user
specified custom frequencies not specified in Table 1.
Output frequencies are generated based on the following
equation: FOUT = (Fxtal/P) * M B N, with the stipulation
that the internal VCO frequency be
400 MHz < VCO < 850 MHz with VCO = FOUT * N and
10 MHz < Fxtal < 28 MHz.
Output Enable
The NB4N441 incorporates a synchronous output
Disable/Enable pin, OE. The synchronous output enable pin
insures no runt clock pulses are generated. When disabled,
CLKOUT is set LOW and CLKOUT is set HIGH.
Table 8. Table 8. Output Enable Function
OE Function
1 Clock Outputs Enabled
0 Clock Outputs Disabled
CLKOUT = L, CLKOUT = H
Lock Detect Functionality
The NB4N441 features a PLL Lock Detect function
which indicates the locked status of the PLL. When the PLL
is locked, the LOCKED output pin asserts a logic Low.
When the internal phase lock is lost (such as when the input
clock stops, drifts beyond the pullable range of the crystal,
or suddenly shifts in phase), the LOCKED output goes High.
Table 9. Table 9. Lock Detect Function
LOCKED
Function
0 PLL is Locked
1 PLL is not Locked
Using the OnBoard Crystal Oscillator
The NB4N441 features a fully integrated onboard
crystal oscillator to minimize system implementation costs.
The crystal should be fundamental mode, parallel
resonant. For exact tuning of cyrstal frequency, capacitors
should be connected from pins X1 and X2. Typical loading
should be on the order of 20 pF to 30 pF (on each crystal
input pin). As the oscillator is somewhat sensitive to loading
on its inputs, the user is advised to mount the crystal as close
to the NB4N441 as possible to avoid any board level
parasitic effects. To facilitate collocation, surface mount
crystals are recommended, but not required.
Table 10. CRYSTAL SPECIFICATIONS
Parameter
Value
Crystal Cut
Fundamental AT Cut
Resonance
Parallel Resonance
Load Capacitance
18 pF
Frequency Tolerance
±15 ppm at 25°C
Frequency/Temperature Stability
±20 ppm 0 to 70°C
Operating Range
0 to 70°C or
40 to +85°C
Shunt Capacitance
5 pF Max
Equivalent Series Resistance (ESR)
50 W Max
Correlation Drive Level
1.0 mW Max
Aging
5 ppm / Yr
(First 3 Years)
15 ppm /10 Yrs
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부품번호상세설명 및 기능제조사
NB4N441

3.3V Serial Input MultiProtocol PLL Clock Synthesizer

ON Semiconductor
ON Semiconductor

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