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ADP1621 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ADP1621
기능 Current-Mode Step-Up DC/DC Controller
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ADP1621 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Constant-Frequency, Current-Mode
Step-Up DC/DC Controller
ADP1621
FEATURES
92% efficiency (no sense resistor required)
±1.0% initial accuracy
IC supply voltage range: 2.9 V to 5.5 V
Power-input voltage as low as 1.0 V
Capable of high supply input voltage (>5.5 V)
with an external NPN or a resistor
VIN UVLO and 35 mA shunt regulator
External slope compensation with 1 resistor
Programmable operating frequency
(100 kHz to 1.5 MHz) with 1 resistor
Lossless current sensing for switch-node voltage <30 V
Resistor current sensing for switch-node voltage >30 V
Synchronizable to external clock
Current-mode operation for excellent line and load transient
responses
10 μA shutdown current
Current limit and thermal overload protection
Soft start in 2048 clock cycles
APPLICATIONS
APD bias
Portable electronic equipment
Isolated dc/dc converter
Step-up/step-down dc/dc converter
LED driver for laptop computer and navigation system
LCD backlighting
GENERAL DESCRIPTION
The ADP1621 is a fixed-frequency, pulse-width modulation
(PWM), current-mode, step-up converter controller. It drives an
external n-channel MOSFET to convert the input voltage to a
higher output voltage. The ADP1621 can also be used to drive
flyback, SEPIC, and forward converter topologies, either isolated
or nonisolated.
The ADP1621 eliminates the use of a current-sense power
resistor by measuring the voltage drop across the on resistance
of the n-channel MOSFET. This technique, allowed up to a
maximum voltage of 30 V at the switch node, maximizes
efficiency and reduces cost. For switch-node voltages higher than
30 V or for more accurate current limiting, the CS pin can be
connected to a current-sense resistor in the source of the MOSFET.
The slope compensation is implemented by an external resistor,
allowing a wide range of external components (inductors and
MOSFETs), and can be chosen for various switching frequencies
and input and output voltages.
The ADP1621 supply input voltage range is 2.9 V to 5.5 V, although
higher input voltages are possible with the use of a small-signal
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
TYPICAL APPLICATION CIRCUIT
VIN = 3.3V
L1
4.7µH
D1
C3 C4
1µF 0.1µF
10V 10V
PIN IN
RS
80
CS
R1
35.7k
1%
ADP1621
SDSN
GATE
R2
11.5k
M1 1%
COMP
PGND
C2
120pF
RCOMP
9.09k
CCOMP
1.8nF
FREQ
FB
GND
RFREQ
31.6k
1%
VOUT = 5V
1A
COUT1
1µF
10V
COUT2
10µF
10V
COUT3
150µF
6.3V
×2
C1
47µF
6.3V
AGND
fOSC = 600kHz
C1 = MURATA GRM31CR60J476M
COUT3 = SANYO POSCAP 6TPE150M
L1 = TOKO FDV0630-4R7M
M1 = VISHAY Si7882DP
D1 = VISHAY SSA33L
Figure 1. High Efficiency Output Boost Converter in Lossless Mode,
3.3 V Input, 5 V Output (Bootstrapped)
100
90
80
70
60
50
40
30
0.01
0.1
1
LOAD CURRENT (A)
Figure 2. Efficiency of Circuit Shown in Figure 1
10
NPN pass transistor or a single resistor. The voltage of the
power input can be as low as 1 V for fuel cell applications. The
switching frequency is set by an external resistor over a range of
100 kHz to 1.5 MHz and can be synchronized to an external
clock by using the SDSN pin. The shutdown quiescent current is
less than 10 μA. The ADP1621 has a thermal shutdown feature
that shuts down the gate driver when the junction temperature
reaches approximately 150°C. The internal soft start circuit limits
inrush current at startup. The ADP1621 is available in the 10-lead
MSOP lead-free package and is specified over the −40°C to +125°C
junction temperature range.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.




ADP1621 pdf, 반도체, 판매, 대치품
ADP1621
Parameter
GATE DRIVER
GATE Rise Time9
GATE Fall Time9
Symbol
tR
tF
Conditions
CGATE = 3.3 nF
CGATE = 3.3 nF
Min Typ
17
13
Max Unit
ns
ns
1 The maximum input voltage is the shunt regulation voltage, which is typically 5.5 V and can range from 5.3 V to 6.0 V over the specified temperature range.
2 The ADP1621 is tested in a feedback servo loop, which servos VFB to the internal reference voltage. The voltage change in FB is measured while VIN is changed from
2.9 V to 5 V. The line regulation is calculated by (∆VFB/VFB) × 100%/∆VIN.
3 The ADP1621 is tested in a feedback servo loop, which servos VFB to the internal reference voltage, and VCOMP is forced from 1.4 V to 1.5 V. The VCOMP range is
(1.0 V ≤ VCOMP ≤ 2.0 V).
4 The peak slope-compensation current at the CS pin is typically 70 μA, and effectively clamped at 116 mV. Thus, RS should not exceed 1.6 kΩ (116 mV/70 μA).
5 Guaranteed by design for thermal shutdown. When the thermal junction temperature of the ADP1621 reaches approximately 150°C, the ADP1621 goes into thermal
shutdown and the GATE voltage is pulled low. When the junction temperature drops below about 140°C, the soft start sequence is initiated and the ADP1621 resumes
normal operation.
6 fOSC is the natural oscillation frequency, fSYNC is the synchronization frequency, and fSW is the switching frequency. If synchronization is used, then fSW = fSYNC; otherwise, fSW = fOSC.
7 Guaranteed by design and bench characterization.
8 To ensure proper synchronization operation, set the synchronization frequency, fSYNC, to 1.2× of the free-running frequency, fOSC. Although the switching frequency can
be synchronized to as high as 1.8 MHz, the peak slope-compensation current decreases at higher synchronization frequencies. It is recommended that the maximum
fSYNC be less than 1.4× of fOSC and should not exceed 1.8 MHz. The slope-compensation resistor, RS, should be chosen for the synchronization frequency (see the Slope
Compensation section in the Application Information: Boost Converter section).
9 GATE rise and fall times are measured from 10% to 90% levels.
Rev. A | Page 4 of 32

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ADP1621 전자부품, 판매, 대치품
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
SDSN 1
GND 2
COMP 3
FB 4
FREQ 5
10 IN
ADP1621
TOP VIEW
(Not to Scale)
9 CS
8 PIN
7 GATE
6 PGND
Figure 4. Pin Configuration
ADP1621
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
SDSN
Shutdown and Synchronization Input. Turn the ADP1621 on by driving SDSN high; turn it off by driving SDSN low.
If SDSN is left floating or when the SDSN is pulled low, the ADP1621 goes into shutdown after 50 μs. If synchronization is
needed, synchronize the switching frequency to an external clock by connecting the external clock to the SDSN
pin. An internal 100 kΩ pull-down resistor is connected from SDSN to GND.
2
GND
Ground.
3
COMP
Regulation Control Compensation Node. COMP is the output of the internal transconductance error amplifier.
Connect a series RC from COMP to GND to compensate the regulator. The nominal voltage range for this pin is
1.0 V to 2.0 V.
4 FB
Feedback Input. FB is the input to the internal transconductance error amplifier. Drive FB from the output voltage
through a resistive voltage divider. The ratio of the voltage divider sets the output voltage. The regulation voltage
at FB is nominally 1.215 V.
5
FREQ
Frequency Control Input. Connect a resistor from FREQ to GND to set the free-running switching frequency
between 100 kHz and 1.5 MHz. The nominal voltage of this pin is 1.4 V.
6
PGND
Power Ground Input. PGND is the ground return for the internal gate driver and the negative input of the internal
current-sense amplifier. Connect PGND to GND as close to the ADP1621 as possible.
7
GATE
Gate Driver Output. The maximum gate driver output is equal to the PIN voltage. GATE drives the gate of the
external n-channel power MOSFET. Connect GATE to the gate of the MOSFET.
8 PIN
Power Input. PIN powers the gate driver output. An internal 5.5 V shunt regulator is connected to this pin. Bypass
PIN to PGND with a 0.1 μF or greater capacitor.
9 CS
Current-Sense Input. CS is the positive input of the current-sense amplifier. When GATE is turned on, the voltage at
the CS pin increases linearly from 0 V to a maximum of 116 mV, and the nominal peak slope-compensation output
current is 70 μA. When GATE is off, the CS function is disabled. For current sensing in lossless mode, connect CS to
the drain of the power MOSFET. The absolute maximum voltage at CS is 33 V. For higher accuracy current sensing
or higher switch-node voltages, connect CS to a current-sense power resistor in the source of the power MOSFET.
In both sensing methods, it is required to add a slope-compensation resistor, RS, to the CS pin to achieve stability
in the inductor current for duty cycles greater than 50%. However, it is recommended to add RS for all duty cycles
because load transients can momentarily cause the duty cycle to be greater than 50%, even when the steady-
state duty cycle is less than 50%.
10 IN
Input Voltage. IN powers the ADP1621 internal circuitry. An internal 5.5 V shunt regulator is connected to this pin.
Bypass IN to GND with a 0.1 μF or greater capacitor.
Rev. A | Page 7 of 32

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