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ADP1822 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 ADP1822은 전자 산업 및 응용 분야에서
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부품번호 ADP1822 기능
기능 Step-Down DC-to-DC Controller
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ADP1822 데이터시트, 핀배열, 회로
www.DataSheet4U.com
PWM, Step-Down DC-to-DC Controller
with Margining and Tracking
ADP1822
FEATURES
Wide input voltage range: 1 V to 24 V
Wide output voltage range: 0.6 V to 85% of input voltage
1% accuracy, 0.6 V reference voltage
Output voltage margining control
Output voltage tracking
All N-channel MOSFET
300 kHz, 600 kHz, or up to 1.2 MHz synchronized frequency
No current sense resistor required
Power-good output
Programmable soft start with reverse current protection
Current-limit protection
Thermal overload protection
Overvoltage protection
Undervoltage lockout
1 μA shutdown supply current
Small, 24-lead QSOP package
APPLICATIONS
Telecom and networking systems
High performance servers
Medical imaging systems
DSP core power supplies
Microprocessor core power supplies
Mobile communication base stations
Distributed power
GENERAL DESCRIPTION
The ADP1822 is a versatile and inexpensive synchronous voltage-
mode PWM step-down controller. It drives an all N-channel power
stage to regulate an output voltage as low as 0.6 V.
The ADP1822 regulated output can track another power supply
and be dynamically adjusted up or down with the controller’s
margining-control inputs, making it ideal for high reliability
applications. It is well suited for a wide range of high power
applications, such as DSP power and processor core power in
telecom, medical imaging, high performance servers, and
industrial applications. It operates from a 3.0 V to 5.5 V supply
with power input voltage ranging from 1.0 V to 24 V.
The ADP1822 can operate at any frequency between 300 kHz
and 1.2 MHz either by synchronizing with an external source or
an internally generated, logic-controlled clock of 300 kHz or
600 kHz. It includes an adjustable soft start to allow sequencing
and quick power-up while preventing input inrush current.
Output reverse-current protection at startup prevents excessive
output voltage excursions. The adjustable, virtually lossless
current-limit scheme reduces external part count and improves
efficiency.
The ADP1822 operates over the −40°C to +85°C temperature
range and is available in a 24-lead QSOP package.
BIAS INPUT
5V
1µF
15pF
80.6k
309pF
CMOSH-3
10
1µF
VCC VCC BST
ADP1822 DH
SHDN
FREQ
SYNC
PWGD
SW
CSL
DL
PGND
MAR
MSEL
FB
TRKP
TRKN
COMP
MDN
SS AGND DGND MUP
100nF
0.1µF
6.18k
2.2pF
1nF
158k
316k
180µF
20V
POWER INPUT
2.25V TO 24V
IRF3711
1µH
IRF3711
20k
OUTPUT
1000µF 1.8V, 15A
4V
10k
TRACKING
SIGNAL INPUT
Figure 1. Typical Operating Circuit
97
96
3.3V OUTPUT
95
94
93
92 1.8V OUTPUT
91
90
89
88
87
0 2 4 6 8 10 12 14
LOAD CURRENT (A)
Figure 2. Efficiency vs. Load Current, 5 V Input
16
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.




ADP1822 pdf, 반도체, 판매, 대치품
ADP1822
Parameter
TRKN Pull-Down Resistance
LOGIC THRESHOLDS (SHDN, SYNC, FREQ, MAR, MSEL)
Input High Voltage
Input Low Voltage
SYNC, FREQ Input Leakage Current
SHDN, MAR, MSEL Pull-Down Resistance
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
PWGD OUTPUT
FB Overvoltage Threshold
FB Overvoltage Hysteresis
FB Undervoltage Threshold
FB Undervoltage Hysteresis
PWGD Off Current
PWGD Low Voltage
Conditions
VVCC = 3.0 V to 5.5 V
VVCC = 3.0 V to 5.5 V
SYNC = FREQ = GND
VFB rising
VFB rising
VPWGD = 5 V
IPWGD = 10 mA
Min Typ Max Unit
200 kΩ
2.0 V
0.8 V
0.1 1
μA
100 kΩ
145 °C
10 °C
750
35
550
35
1
150 500
mV
mV
mV
mV
μA
mV
Rev. B | Page 4 of 24

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ADP1822 전자부품, 판매, 대치품
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
ADP1822
BST 1
DH 2
SW 3
SYNC 4
FREQ 5
MAR 6
TRKN 7
TRKP 8
SHDN 9
PWGD 10
DGND 11
GND 12
ADP1822
TOP VIEW
(Not to Scale)
24 NC
23 PVCC
22 DL
21 PGND
20 CSL
19 VCC
18 MUP
17 MDN
16 MSEL
15 COMP
14 FB
13 SS
NC = NO CONNECT
Figure 4. Pin Configuration
Table 3. Pin Function Descriptions
Pin
No. Mnemonic Description
1 BST
High-Side Gate Driver Boost Capacitor Input. A capacitor between SW and BST powers the high-side gate driver DH.
The capacitor is charged through a diode from PVCC when the low-side MOSFET is on. Connect a 0.1 μF or greater
ceramic capacitor from BST to SW and a Schottky diode from PVCC to BST to power the high-side gate driver.
2 DH
3 SW
High-Side Gate Driver Output. Connect DH to the gate of the external high-side N-channel MOSFET switch.
DH is powered from the capacitor between SW and BST and its voltage swings between VSW and VBST.
Power Switch Node. SW is the power switching node. Connect the source of the high-side N-channel MOSFET
switch and the drain of the low-side N-channel MOSFET synchronous rectifier to SW. SW powers the output
through the output LC filter.
4 SYNC
Frequency Synchronization Input. Drive SYNC with an external 300 kHz to 1.2 MHz signal to synchronize the
converter switching frequency to the applied signal. The maximum SYNC frequency is limited to 2× the nominal
internal frequency selected by FREQ. Do not leave SYNC unconnected; when not used, connect SYNC to GND.
5 FREQ
Frequency Select Input. FREQ selects the converter switching frequency. Drive FREQ low to select 300 kHz, or
high to select 600 kHz. Do not leave FREQ unconnected.
6 MAR
Margin Control Input. MAR is used with MSEL to control output voltage margining. MAR chooses between
high voltage and low voltage margining when MSEL is driven high. If not used, connect MAR to GND.
7 TRKN
Tracking Comparator Negative Input. Drive TRKN from the voltage that the ADP1822 output voltage tracks.
TRKN voltage is limited to VCC. See the Output Voltage Tracking section.
8 TRKP
Tracking Comparator Positive Input. Drive TRKP from the output voltage. TRKP voltage is limited to VCC.
See the Output Voltage Tracking section.
9 SHDN
Active Low DC-to-DC Shutdown Input. Drive SHDN high to turn on the converter. Drive it low to turn it off.
Connect SHDN to VCC for automatic startup.
10 PWGD
Open-Drain Power-Good Output. PWGD sinks current to GND when the output voltage is above or below
the regulation voltage. Connect a pull-up resistor from PWGD to VDD for a logical power-good indicator.
11 DGND
Digital Ground. Connect DGND to GND at a single point as close as possible to the IC.
12 GND
Analog Ground. Connect GND to PGND at a single point as close as possible to the IC.
13 SS
Soft Start Control Input. A capacitor from SS to GND controls the soft start period. When the output is overloaded,
SS is discharged to prevent excessive input current while the output recovers. Connect a 1 nF to 1 μF capacitor
from SS to GND to set the soft start period. See the Soft Start section.
14 FB
Voltage Feedback Input. Connect to a resistive voltage divider from the output to FB to set the output voltage.
See the Setting the Output Voltage section.
15 COMP
Compensation Node. Connect a resistor-capacitor network from COMP to FB to compensate the regulation
control system. See the Compensation section.
16 MSEL
Margin Select Input. Drive MSEL high to activate the voltage margining feature. Drive MSEL low to regulate
the output voltage to the nominal value. If not used, connect MSEL to GND.
Rev. B | Page 7 of 24

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