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PDF AD5930 Data sheet ( Hoja de datos )
| Número de pieza | AD5930 | |
| Descripción | Programmable Frequency Sweep and Output Burst Waveform Generator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Programmable Frequency Sweep and
Output Burst Waveform Generator
AD5930
FEATURES
Programmable frequency profile
No external components necessary
Output frequency up to 25 MHz
Burst and listen capability
Preprogrammable frequency profile minimizes number of
DSP/µcontroller writes
Sinusoidal/triangular/square wave outputs
Automatic or single pin control of frequency stepping
Waveform starts at known phase
Increments at 0° phase or phase continuously
Power-down mode: 20 µA
Power supply: 2.3 V to 5.5 V
Automotive temperature range: −40°C to +125°C
20-lead pb-free TSSOP
APPLICATIONS
Frequency sweeping/radar
Network/impedance measurements
Incremental frequency stimulus
Sensory applications
Proximity and motion
BFSK
Frequency bursting/pulse trains
GENERAL DESCRIPTION
The AD59301 is a waveform generator with programmable
frequency sweep and output burst capability. Utilizing
embedded digital processing that allows enhanced frequency
control, the device generates synthesized analog or digital
frequency-stepped waveforms. Because frequency profiles
are preprogrammed, continuous write cycles are eliminated
and thereby free up valuable DSP/µcontroller resources.
Waveforms start from a known phase and are incremented
phase continuously, which allows phase shifts to be easily
determined. Consuming only 8 mA, the AD5930 provides a
convenient low power solution to waveform generation.
The AD5930 can be operated in a variety of modes. In
continuous output mode, the device outputs the required
frequency for a defined length of time and then steps to the
next frequency. The length of time the device outputs a
particular frequency is either preprogrammed and the device
increments the frequency automatically, or, alternatively, is
incremented externally via the CTRL pin. In burst mode, the
device outputs its frequency for a length of time and then
returns to midscale for a further predefined length of time
before stepping to the next frequency. When the MSBOUT pin
is enabled, a digital output is generated.
(continued on Page 3)
FUNCTIONAL BLOCK DIAGRAM
INTERRUPT STANDBY
DVDD CAP/2.5V DGND AGND AVDD
MCLK
CTRL
AD5930
REGULATOR
OUTPUT BURST
CONTROLLER
VCC
2.5V
SYNC
BUFFER
DATA
SYNC
INCREMENT
CONTROLLER
DATA
INCR
FREQUENCY
CONTROLLER
24
24-BIT
PIPELINED
DDS CORE
DATA AND CONTROL
SERIAL INTERFACE
CONTROL
REGISTER
ON-BOARD
REFERENCE
BUFFER
10-BIT
DAC
FULL-SCALE
CONTROL
FSYNC SCLK SDATA
1 Protected by US Patent Number 6747583, other patents pending.
Figure 1.
REF FSADJUST
SYNCOUT
DGND O/P
MSBOUT
IOUTB
IOUT
COMP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice.
No license is granted by implication or otherwise under any patent or patent rights of Analog
Devices.Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD5930
Parameter
POWER REQUIREMENTS
AVDD/DVDD
IAA
IDD
IAA + IDD
Low Power Sleep Mode
Y Grade1
Min Typ Max Unit
2.3 5.5 V
3.8 4
mA
2.4 2.7 mA
6.2 6.7 mA
20 85 µA
140 240 µA
Test Conditions/Comments
fMCLK = 50 MHz, fOUT = fMCLK/7
Device is reset before putting into standby
All outputs powered down, MCLK = 0 V, serial interface active
All outputs powered down, MCLK active, serial interface active
1 Operating temperature range is as follows: Y Version: −40°C to +125°C; typical specifications are at 25°C.
2 Guaranteed by design.
3 Minimum RSET = 3.9 kΩ.
100nF
10nF
RSET
6.8V
CAP/2.5V
REFOUT
FSADJUST
REGULATOR
ON-BOARD
REFERENCE
FULL-SCALE COMP
CONTROL
AVDD
10nF
AD5930 12
SIN
ROM
10-BIT
DAC
IOUT
RLOAD
200V
Figure 2. Test Circuit Used to Test the Specifications
20pF
Rev. 0 | Page 5 of 28
5 Page 
TYPICAL PERFORMANCE CHARACTERISTICS
9
TA = 25°C
8 AVDD = 5V
MSBOUT, SYNCOUT ENABLED
7
DVDD = 5V
6
5 DVDD = 3V
4
3 DVDD = 5V, FOUT = MCLK/7
2
1 DVDD = 3V, FOUT = MCLK/7
0
0 5 10 15 20 25 30 35 40 45 50
MCLK FREQUENCY (MHz)
Figure 9. Current Consumption (IDD) vs. MCLK Frequency
7
TA = 25°C
MCLK = 50MHz
6
MSBOUT ON,
SYNCOUT ON
5
MSBOUT OFF,
SYNCOUT ON
MSBOUT ON,
4 SYNCOUT OFF
3
MSBOUT OFF,
2 SYNCOUT OFF
1
0
1kHz 100kHz 1MHz
5MHz 15MHz 25MHz
500kHz 10kHz 500kHz 2MHz 10MHz 20MHz
FOUT (Hz)
Figure 10. IDD vs. FOUT for Various Digital Output Conditions
3.5
3.0 AIDD
2.5
DIDD
2.0
1.5
1.0
LEGEND
1. SINEWAVE OUTPUT, INTERNALLY CONTROLLED SWEEP
0.5 2. TRIANGULAR OUTPUT, INTERNALLY CONTROLLED SWEEP
3. SINEWAVE OUTPUT, EXTERNALLY CONTROLLED SWEEP
0 4. TRIANGULAR OUTPUT, EXTERNALLY CONTROLLED SWEEP
12 3
CONTROL OPTION (See Legend)
Figure 11. IDD vs. Output Waveform Type and Control
4
AD5930
–40
AVDD = DVDD = 3V/5V
–45 MCLK = 50MHz
CREG = 0111 1111 1111
–50 TA = 25°C
–55
FOUT = MCLK/7
–60 FOUT = MCLK/50
–65
–70
–75 FOUT = MCLK/3
–80
–85
–90
0
5 10 15 20 25 30 35 40 45 50
MCLK FREQUENCY (MHz)
Figure 12. Wideband SFDR vs. MCLK Frequency
–60
AVDD = DVDD = 3V/5V
MCLK = 50MHz
–65 CREG = 0111 1111 1111
TA = 25°C
–70
FOUT = MCLK/50
–75 FOUT = MCLK/3
–80
–85 FOUT = MCLK/7
–90
0
5 10 15 20 25 30 35 40 45 50
MCLK FREQUENCY (MHz)
Figure 13. Narrowband SFDR vs. MCLK Frequency
–30
AVDD = DVDD = 3V/5V
CREG = 0111 1111 1111
–40 TA = 25°C
MCLK = 50MHz
–50
–60
MCLK = 10MHz
–70
MCLK = 1MHz
–80
MCLK = 30MHz
–90
0.001
0.01
0.1 1
FOUT (MHz)
10 100
Figure 14. Wideband SFDR vs. FOUT for Various MCLK Frequencies
Rev. 0 | Page 11 of 28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet AD5930.PDF ] | |
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