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PDF P89LPC9408 Data sheet ( Hoja de datos )

Número de pieza P89LPC9408
Descripción 8-bit microcontroller
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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P89LPC9408
8-bit microcontroller with two-clock 80C51 core 8 kB 3 V
byte-erasable flash, 32 segment × 4 LCD driver, 10-bit ADC
Rev. 01 — 16 December 2005
Product data sheet
1. General description
The P89LPC9408 is a multi-chip module consisting of a P89LPC938 single-chip
microcontroller combined with a PCF8576D universal LCD controller in a low-cost 64-pin
package. The LCD controller provides 32 segments and supports from 1 to 4 backplanes.
Display overhead is minimized by an on-chip display RAM with auto-increment
addressing.
2. Features
2.1 Principal features
s 8 kB byte-erasable flash code memory organized into 1 kB sectors and 64-byte pages.
Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
s 256-byte RAM data memory.
s 512-byte customer Data EEPROM on chip allows serialization of devices, storage of
set-up parameters, etc.
s 32 segment × 4 backplane LCD controller supports from 1 to 4 backplanes.
s 8-input multiplexed 10-bit ADC. Two analog comparators with selectable inputs and
reference source.
s Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as a Real-Time Clock (RTC).
s Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I2C-bus
communication port and SPI communication port.
s CCU provides PWM, input capture, and output compare functions.
s High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and fine tunable.
s 64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23
microcontroller I/O pins while using on-chip oscillator and reset options.
2.2 Additional features
s 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or
driven to 5.5 V).
s Serial flash In-Circuit Programming (ICP) allows simple production coding with
commercial EPROM programmers. Flash security bits prevent reading of sensitive
application programs.

1 page




P89LPC9408 pdf
Philips Semiconductors
P89LPC9408
8-bit two-clock 80C51 core with 32 segment × 4 LCD driver, 10-bit ADC
VDD
VLCD
CLK
SYNC
OSC
VSS
SCL
SDA
BP0 BP1 BP2 BP3
S0 TO S39
LCD BIAS
GENERATOR
LCD
VOLTAGE
SELECTOR
BACKPLANE
OUTPUTS
TIMING
OSCILLATOR
INPUT
FILTERS
BLINKER
POWER-
ON
RESET
DISPLAY
CONTROLLER
COMMAND
DECODER
I2C-BUS
CONTROLLER
DISPLAY SEGMENT OUTPUTS
DISPLAY LATCH
SHIFT REGISTER
INPUT
BANK
SELECTOR
DISPLAY
RAM
40 × 4 BITS
OUTPUT
BANK
SELECTOR
DATA
POINTER
SUB-
ADDRESS
COUNTER
SA0
Fig 3. LCD display controller block diagram
5. Functional diagram
A0 A1 A2
002aab470
VDD VSS
AD05
AD00
AD01
AD02
AD03
KBI0
KBI1
KBI2
KBI3
KBI4
KBI5
KBI6
KBI7
CLKOUT
CMP2
CIN2B
CIN2A
CIN1B
CIN1A
CMPREF
CMP1
T1
XTAL2
XTAL1
PORT 0
PORT 3
Fig 4. P89LPC9408 functional diagram
P89LPC9408
002aab776
PORT 1
PORT 2
TXD
RXD
T0
INT0
INT1
RST
OCB
OCC
SCL
SDA
AD04
ICB
OCD
MOSI
MISO
SS
SPICLK
OCA
ICA
AD07
AD06
P89LPC9408_1
Product data sheet
Rev. 01 — 16 December 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 69

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P89LPC9408 arduino
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Table 4: Special function registers
* indicates SFRs that are bit addressable.
Name
Description
SFR Bit functions and addresses
addr. MSB
LSB
Reset value
Hex Binary
Bit address E7 E6 E5 E4 E3 E2 E1 E0
ACC*
Accumulator
E0H
00 0000 0000
AD0CON ADC0 control
register
97H ENBI0 ENADCI0 TMM0 EDGE0 ADCI0 ENADC0 ADCS01 ADCS00 00
0000 0000
AD0INS ADC0 input select A3H ADI07
ADI06
ADI05
ADI04
ADI03
ADI02
ADI01
ADI00 00
0000 0000
AD0MODA ADC0 mode
C0H BNDI0 BURST0 SCC0 SCAN0
-
-
-
- 00 0000 0000
register A
AD0MODB ADC0 mode
A1H CLK2
CLK1
CLK0
-
-
-
-
- 00 000x 0000
register B
AUXR1
Auxiliary function
register
A2H CLKLP
EBRR
ENT1
ENT0
SRST
0
-
DPS 00
0000 00x0
Bit address F7 F6 F5 F4 F3 F2 F1 F0
B* B register
F0H
00 0000 0000
BRGR0 [1] Baud rate generator BEH
rate low
00 0000 0000
BRGR1 [1] Baud rate generator BFH
rate high
00 0000 0000
BRGCON Baud rate generator BDH
-
-
-
-
-
- SBRGS BRGEN 00 [1] xxxx xx00
control
CCCRA
Capture compare A EAH ICECA2 ICECA1 ICECA0
control register
ICESA
ICNFA
FCOA OCMA1 OCMA0 00
0000 0000
CCCRB
Capture compare B EBH ICECB2 ICECB1 ICECB0
control register
ICESB
ICNFB
FCOB OCMB1 OCMB0 00
0000 0000
CCCRC Capture compare C ECH
-
-
-
-
-
FCOC OCMC1 OCMC0 00
xxxx x000
control register
CCCRD Capture compare D EDH
-
-
-
-
-
FCOD OCMD1 OCMD0 00
xxxx x000
control register
CMP1
Comparator 1
control register
ACH
-
-
CE1
CP1
CN1
OE1
CO1
CMF1 00 [2] xx00 0000
CMP2
Comparator 2
control register
ADH
-
-
CE2
CP2
CN2
OE2
CO2
CMF2 00 [2] xx00 0000
DEECON Data EEPROM
F1H EEIF HVERR ECTL1 ECTL0
-
-
-
EADR8 0E
0000 1110
control register

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