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PDF AZ100EL32 Data sheet ( Hoja de datos )
| Número de pieza | AZ100EL32 | |
| Descripción | ECL/PECL / 2 Divider | |
| Fabricantes | Arizona | |
| Logotipo |  |
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ARIZONA MICROTEK, INC.
AZ10EL32
AZ100EL32
ECL/PECL ÷ 2 Divider
FEATURES
• 510ps Propagation Delay
• 3.0GHz Toggle Frequency
• High Bandwidth Output Transitions
• 75kΩ Internal Input Pulldown Resistors
• Direct Replacement for ON
Semiconductor MC10EL32 &
MC100EL32
DESCRIPTION
PACKAGE AVAILABILITY
PACKAGE
PART NUMBER MARKING NOTES
SOIC 8
AZ10EL32D
AZM10
EL32
1,2
SOIC 8
AZ100EL32D
AZM100
EL32
1,2
SOIC 8 RoHS
Compliant / Lead
(Pb) Free
AZ100EL32D+
AZM100+
EL32
1,2
TSSOP 8
AZ10EL32T
AZT
EL32
1,2
TSSOP 8
AZ100LVEL32T
AZH
EL32
1,2
1 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2 Date code format: “Y” or “YY” for year followed by “WW” for week on
underside of part.
The AZ10/100EL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge.
Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the synchronization of
multiple EL32’s in a system.
The EL32 provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device. For
single-ended input applications, the VBB reference should be connected to one side of the CLK/¯C¯L¯K¯ differential input
pair. The input signal is then fed to the other CLK/¯C¯L¯K¯ input. The VBB pin should be used only as a bias for the
EL32 as its sink/source capability is limited. When used, the VBB pin should be bypassed to ground via a 0.01μF
capacitor.
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
LOGIC DIAGRAM AND PINOUT ASSIGNMENT
PIN DESCRIPTION
PIN
CLK, C¯L¯¯K
RESET
VBB
Q, Q¯
VCC
VEE
FUNCTION
Clock Inputs
Asynchronous Reset
Reference Voltage Output
Data Outputs
Positive Supply
Negative Supply
RESET 1
CLK 2
CLK 3
VBB 4
8 VCC
R
7Q
÷2
6Q
5 VEE
1630 S. STAPLEY DR., SUITE 125 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541
www.azmicrotek.com
1 page  
AZ10EL32
AZ100EL32
PACKAGE DIAGRAM
TSSOP 8
NOTES:
1. DIMENSIONS D AND E DO NOT
INCLUDE MOLD PROTRUSION.
2. MAXIMUM MOLD PROTRUSION
FOR D IS 0.15mm.
3. MAXIMUM MOLD PROTRUSION
FOR E IS 0.25mm.
DIM
A
A1
A2
A3
bp
c
D
E
e
HE
L
Lp
v
w
y
Z
θ
MILLIMETERS
MIN MAX
1.10
0.05 0.15
0.80 0.95
0.25
0.25 0.45
0.15 0.28
2.90 3.10
2.90 3.10
0.65
4.70 5.10
0.94
0.40 0.70
0.10
0.10
0.10
0.35 0.70
0O 6O
October 2005 * REV - 3
www.azmicrotek.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet AZ100EL32.PDF ] | |
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