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PDF MB1503 Data sheet ( Hoja de datos )
| Número de pieza | MB1503 | |
| Descripción | LOW-POWER PLL FREQUENCY SYNTHESIZER | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MB1503 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
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www.DataSheet4U.com
Sept. 1995
Edition 1.0a
DATA SHEET
MB1503
LOW-POWER PLL FREQUENCY SYNTHESIZER WITH
POWER SAVE FUNCTION (1.1GHz)
The Fujitsu MB1503 is a serial input phase-locked loop (PLL) frequency synthesizer with a
pulse-swallow function. A stand-by mode is provided to limit power consumption during
intermittent operation.
The MB1503 is configured of a 1.1GHz dual-modulus prescaler with 128/129 divide ratio,
control signal generator, 16-bit shift register, 15-bit latch, programmable reference divider
(binary 14-bit programmable reference counter), 1-bit switch counter, phase comparator
with phase conversion function, charge pump, crystal oscillator, 19-bit shift register, 18-bit
latch, programmable divider (binary 7-bit swallow counter and binary 11-bit programmable
counter), analog switches, and an intermittent operation control circuit that selects the
operating or stand-by mode depending on the power-save control input state (PS).
The MB1503 operates from a single +5 V supply. Fujitsu’s advanced technology achieves
an Icc of 8mA, typical. The stand-by mode current consumption is just 100µA.
Features
• High operating frequency
• Pulse-swallow function
: fIN = 1.1GHz (PIN = –10dBm)
: High-speed dual-modulus prescaler with 128/129
divide ratio
• Low supply current
: ICC = 8mA typ. at 5V
• Power-saving stand-by mode : 100µA
• Serial input, 18-bit programmable divider consisting of:
– Binary 7-bit swallow counter
: 0 to 127
– Binary 11-bit programmable counter : 16 to 2,047
• Serial input 15-bit programmable reference divider consisting of:
– Binary 15-bit programmable reference counter: 8 to 16,383
– 1-bit switch counter sets prescaler divide ratio
• On-chip analog switch for fast lock-up
• On-chip charge pump
• Wide operating temperature range: –40 to +85°C
• Plastic 16–pin dual inline package (Suffix : –P)
Plastic 16–pin small outline package (Suffix : –PF)
ABSOLUTE MAXIMUM RATINGS (See NOTE)
PLASTIC PACKAGE
(FPT-16P-M06)
Ratings
Symbol
Value
Unit
Supply Voltage
Output Voltage
Output Current
Storage Temperature
VCC
VP
VOUT
IOUT
Tstg
–0.5 to +7.0
VCC ≤ VP ≤ 10.0
–0.5 to VCC +0.5
±10
–55 to +125
V
V
V
mA
°C
NOTE:
Permanent device damage may occur if the above Absolute Maximum
Ratings are exceeded. Functional operation should be restricted to the
conditions as detailed in the operational sections of this data sheet. Exposure
to absolute maximum rating conditions for extended periods may affect device
reliability.
PLASTIC PACKAGE
(DIP-16P-M04)
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
fields. However, it is advised that normal precautions be
taken to avoid application of any voltage higher than
maximum rated voltages to this high impedance circuit.
Copyright© 1994 by FUJITSULIMITED
1
1 page  
FUNCTIONAL DESCRIPTIONS
MB1503
Pulse swallow function
The divide ratio can be calculated using the following equation:
fVCO = [(M x N) + A] x fOSC ÷ R (A < N)
fVCO : Output frequency of external voltage controlled oscillator (VCO)
N : Preset divide ratio of binary 11-bit programmable counter (16 to 2,047)
A : Preset divide ratio of binary 7-bit swallow counter (0 ≤ A ≤ 127)
fOSC : Output frequency of the reference frequency oscillator
R : Preset divide ratio of binary 14-bit programmable reference counter (8 to 16,383)
M : Preset divide ratio of modules prescaler (128)
Serial data input
Serial data is input using the Data, Clock, and LE pins. Serial data controls the 15-bit programmable reference divider and 18-bit
programmable divider separately.
Binary serial data is input to the Data pin.
One bit of data is shifted into the internal shift registers on the rising edge of the clock. When the load enable pin is high or open, stored
data is latched depending on the control data as follows:
Control data
H
L
Destination of serial data
15-bit latch
18-bit latch
(a) Programmable reference divider ratio
The programmable reference divider consists of a 15-bit latch and a 14-bit reference counter. The serial 16-bit data format is
shown below:
Control bit
LSB
Direction of data shift
Divide ratio setting bit for prescaler
MSB
SSSSSSSSSSSSSS
C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SW
Divide ratio setting bit for programmable reference counter
5
5 Page 
MB1503
ELECTRICAL CHARACTERISTICS
Parameter
Supply Current
Stand-by Current
Symbol
Min
ICC –
IPS –
Operating Frequency
fIN
fIN 10
OSCIN
fOSC
–
Input Sensitivity
fIN
OSCIN
Pf IN
VOSC
–10
0.5
High-level Input Voltage
Low-level Input Voltage
Except fIN and
OSCIN
VIH
VIL
VCC x 0.7
–
High-level Input Current Data, Clock,
LE
Low-level Input Current
FC
IIH
IIL
IFC
–
–
–
Input Current
OSCIN
High-level Output
Voltage
Except DO and
Low-level Output Voltage OSCOUT
High-impedance
Cut off Current
DO
IOSC
VOH
VOL
IOFF
–
4.4
–
–
Output Current
Except DO and
OSCOUT
IOH
IOL
–1.0
1.0
Analog Switch ON Resistance
RON
–
Value
Typ
8.0
100
–
12
–
–
–
–
1.0
–1.0
–60
±50
–
–
–
–
–
25
Max
12.0
–
1100
20
6
–
Unit Condition
With fIN = 1.1GHz, OSCIN =
mA
12MHz, VCC = 5.0V. Inputs
are VCC and outputs are
open.
With fIN = 1.1GHz, OSCIN =
12MHz, VCC = 5.0V. The
µA PS pin is grounded, remain-
ing inputs are at VCC, and
outputs are open.
MHz
AC coupling. The minimum
operating frequency is
measured with a 100pF ca-
pacitor connected.
MHz
—
dBm
—
Vp–p
—
–V
VCC x 0.3
–
V
µA
—
—
—
– µA
– µA
– µA
–V
—
—
—
VCC = 5V
0.4 V
1.1 µA
– mA
– mA
–Ω
—
VDO = GND to 8V
VCC ≤ VP ≤ 8V
—
—
—
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet MB1503.PDF ] | |
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