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PDF CS4350 Data sheet ( Hoja de datos )

Número de pieza CS4350
Descripción 192 kHz Stereo DAC
Fabricantes Cirrus Logic　
Logotipo Cirrus Logic Logotipo



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CS4350
192 kHz Stereo DAC with Integrated PLL
Features
 Advanced Multi-bit Delta-Sigma Architecture
 108 dB Dynamic Range
 -95 dB THD+N
 24-Bit Conversion
 Supports Audio Sample Rates Up to 192 kHz
 Low-Latency Digital Filtering
 Single-Ended or Differential Analog Output
Architecture
 Integrated PLL Locks to Incoming Left-Right
Clock
– Eliminates the Need for External Master-
clock Routing
– Reduces Interference and Jitter Sensitivity
– No External Loop Filter Components
Required
 Automatic Sample-Rate Range Detection
 Popguard® Technology for Control of Clicks
and Pops
– Hardware Popguard Disable for Fast
Startups
 Supports All Standard Serial Audio Formats
Including Time-Division Multiplexed (TDM)
 +1.5 V to 5.0 V Logic Supplies for Serial Port
 +3.3 V to 5.0 V Control Port Interface
Control Port Mode Features
 SPI™ and I²C® Modes
 ATAPI Mixing
 Mute Control for Individual Channels
 Digital Volume Control with Soft Ramp
– 119 dB Attenuation
– 1/2 dB Step Size
– Zero Crossing Click-Free Transitions
3.3 V to 5.0 V
Hardware or I2C/
SPI Control Data
Reset
1.5 V to 5.0 V
Serial Audio Input
LRCK
Recovered MCLK
3.3 V to 5.0 V
Register/
Hardware
Configuration
Interpolation
Filter with
Volume
Control
Multibit ∆Σ
Modulator
DAC
Amp
+
Filter
Left
Channel
Output
PCM
Serial
Interface
Interpolation
Filter with
Volume
Control
Multibit ∆Σ
Modulator
DAC
Amp
+
Filter
Right
Channel
Output
RMCK Phase Locked Loop
Internal Voltage
Reference
and Regulation
External
Mute
Control
Left and
Right Mute
Controls
Advance Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
MARCH '06
DS691A3

1 page




CS4350 pdf
CS4350
LIST OF FIGURES
Figure 1. Output Test Load ........................................................................................................................ 10
Figure 2. Maximum Loading....................................................................................................................... 10
Figure 3. Serial Port Timing, Non-TDM Mode............................................................................................ 12
Figure 4. Serial Port Timing, TDM Mode.................................................................................................... 12
Figure 5. Control Port Timing - I²C Format................................................................................................. 13
Figure 6. Control Port Timing - SPI Mode .................................................................................................. 14
Figure 7. Typical Connection Diagram....................................................................................................... 16
Figure 8. Left-Justified up to 24-Bit Data.................................................................................................... 18
Figure 9. I²S, up to 24-Bit Data .................................................................................................................. 18
Figure 10. Right-Justified Data................................................................................................................... 18
Figure 11. TDM Mode Connection Diagram .............................................................................................. 19
Figure 12. TDM Mode Timing .................................................................................................................... 19
Figure 13. De-Emphasis Curve.................................................................................................................. 20
Figure 14. Differential to Single-ended Output Filter.................................................................................. 22
Figure 15. Passive Single-Ended Output Filter .......................................................................................... 22
Figure 16. Control Port Timing, I²C Mode .................................................................................................. 25
Figure 17. Control Port Timing, SPI Mode ................................................................................................. 26
Figure 18. De-Emphasis Curve.................................................................................................................. 28
Figure 19. ATAPI Block Diagram ............................................................................................................... 30
Figure 20. Stopband Rejection (fast), all Modes ........................................................................................ 35
Figure 21. Stopband Rejection (slow), all Modes....................................................................................... 35
Figure 22. Single-Speed (fast) Passband Detail ........................................................................................ 35
Figure 23. Single-Speed (slow) Passband Detail....................................................................................... 35
Figure 24. Double-Speed (fast) Passband Detail....................................................................................... 35
Figure 25. Double-Speed (slow) Passband Detail ..................................................................................... 35
Figure 26. Quad-Speed (fast) Passband Detail ......................................................................................... 36
Figure 27. Quad-Speed (slow) Passband Detail........................................................................................ 36
LIST OF TABLES
Table 1. Pin Descriptions ............................................................................................................................. 7
Table 2. CS4350 Auto-Detect .................................................................................................................... 17
Table 3. Digital Interface Format - Stand-Alone Mode............................................................................... 23
Table 4. Digital Interface Formats .............................................................................................................. 28
Table 5. ATAPI Decode ............................................................................................................................. 30
Table 6. Example Digital Volume Settings ................................................................................................. 32
DS691A3
5

5 Page





CS4350 arduino
CS4350
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE
The filter characteristics have been normalized to the sample rate (Fs) and can be referenced to the desired sam-
ple rate by multiplying the given characteristic by Fs. Amplitude vs. Frequency plots of this data are available in the
“Filter Plots” on page 35
Parameter
Min
Typ
Max
Unit
Fast Roll-Off
Passband (Note 3)
-0.01 dB corner (Single Speed)
-0.1 dB corner (Double Speed)
-0.2 dB corner (Quad Speed)
-3 dB corner (All Speed Modes)
Frequency Response 10 Hz to 20 kHz
Single Speed
Double Speed, Quad Speed
StopBand
Stop-Band Attenuation (Note 4)
Total Group Delay (Fs = Output Sample Rate)
Intra-channel Phase Deviation
Inter-channel Phase Deviation
De-emphasis Error (Note 5)
Fs = 32 kHz
(Relative to 1 kHz)
Fs = 44.1 kHz
Fs = 48 kHz
Slow Roll-Off (Note 6)
Passband (Note 3)
-0.01 dB corner (Single Speed)
-0.1 dB corner (Double Speed)
-0.2 dB corner (Quad Speed)
-3 dB corner (All Speed Modes)
Frequency Response 10 Hz to 20 kHz
Single Speed
Double Speed, Quad Speed
StopBand
Stop-Band Attenuation (Note 4)
Total Group Delay (Fs = Output Sample Rate)
Intra-channel Phase Deviation
Inter-channel Phase Deviation
De-emphasis Error (Note 5)
Fs = 32 kHz
(Relative to 1 kHz)
Fs = 44.1 kHz
Fs = 48 kHz
0
0
0
0
-0.01
-0.02
0.547
102
-
-
-
-
-
-
0
0
0
0
-0.01
-0.02
.583
64
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9.4/Fs
-
-
-
-
-
-
-
-
-
-
-
-
-
6.5/Fs
-
-
-
-
-
.454
.42
.27
.499
+0.01
+0.02
-
-
-
±0.56/Fs
0
±0.23
±0.14
±0.09
Fs
Fs
Fs
Fs
dB
dB
Fs
dB
s
s
s
dB
dB
dB
0.417
.37
.27
.499
+0.01
+0.02
-
-
-
±0.14/Fs
0
±0.23
±0.14
±0.09
Fs
Fs
Fs
Fs
dB
dB
Fs
dB
s
s
s
dB
dB
dB
Notes:
3.
4.
5.
6.
Response is clock dependent.
The Measurement Bandwidth is from stopband to 3 Fs.
De-emphasis is available only in Single-Speed Mode; Only 44.1 kHz De-emphasis is available in Stand-Alone
Mode.
Slow Roll-off interpolation filter is only available in Control Port Mode.
DS691A3
11

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