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PDF CS48500 Data sheet ( Hoja de datos )
| Número de pieza | CS48500 | |
| Descripción | High-performance 32-bit DSP | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS48500 Data Sheet
FEATURES
Cost-effective, High-performance 32-bit DSP
— 300,000,000 MAC/S (multiply accumulates per second)
— Dual MAC cycles per clock
— 72-bit accumulators are the most accurate in the industry
— 24k x 32 SRAM, 2k blocks - assignable to data or program
— Internal ROM contains a variety of configurable sound
enhancement feature sets
— 8-channel internal DMA
— Internal watch-dog DSP lock-up prevention
DSP Tool Set w/ Private Keys for Protecting Customer IP
Configurable Serial Audio Inputs/Outputs
— Configurable for all input/output types
— Maximum 32-bit @ 192 kHz
— Supports 32-bit audio sample I/O between DSP chips
— TDM input modes (multiple channels on same line)
— 192 kHz SPDIF transmitter
— Multi-channel DSD direct stream digital SACD input
Supports Two Different Input Fs Sample Rates
— Output can be master or slave
— Dual processing path capability
— Input supports dual domain slave clocking
— Hardware assist time sampling for sample rate conversion
Integrated Clock Manager/PLL
— Can operate from external crystal, external oscillator
Input Fs Auto Detection
Host & Boot via Serial Interface
Configurable GPIOs and External Interrupt Input
1.8V Core / 3.3V I/O that are +5V Tolerant
Low-power Mode
— "Energy-Star Ready" via low-power mode, 350uW in standby
Differentiating from the legacy Cirrus multi-standard, multi-
channel decoders, this new CS48500 family is still based on
the same high-performance 32-bit fixed point DSP Digital
Signal Processor core but instead is equipped with much less
memory, tailoring it for more cost-effective applications
associated with multi-channel and virtual-channel sound
enhancements. Target applications are:
— Digital Televisions
— Multimedia Peripherals
— iPod® Docking Stations
— Automotive Head Units
— Automotive Outboard Amplifiers
— HD-DVD & Blu-ray Disc DVD Receivers
— PC Speakers
In these applications there are a wide variety of licensable DSP
IP codes available today from:
wTM
®
Cirrus also has developed, or is developing their own royalty-
free versions of popular features sets like Cirrus Bass
Manager, Cirrus Dynamic Volume Leveler, Cirrus Original
Multichannel Surround, Cirrus Virtual Speaker & Cirrus 3D-
Audio.
The CS48500 is programmed using the Cirrus proprietary DSP
Composer™ GUI development tool. Processing chains may
be designed using a drag-and-drop interface to place/utilize
functional macro audio DSP primitives. The end result is a
software image that is down-loaded to the DSP via serial host
or serial boot modes.
Ordering Information:
See page 23 for ordering information
12 Ch. Audio In /
6 Ch. SACD In
S/PDIF
12 Ch PCM
Audio Out
Serial
Control 1
GPIO
32-bit
DSP
PXY
D
M
A
Debug
Watchdog
TMR1
TMR2
PLL
Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
©Copyright 2006 Cirrus Logic, Inc.
CONFIDENTIAL
DEC ’06
DS734A3
1 page  
CS48500 Data Sheet
32-bit Audio Decoder DSP Family
1. Documentation Strategy
The CS48500 Data Sheet describes the CS48500 family of multichannel audio processors. This
document should be used in conjunction with the following documents when evaluating or designing a
system around the CS48500 family of processors.
Document Name
Description
CS48500 Data Sheet
This document
CS48500 Hardware User’s Manual
Includes detailed system design information
including Typical Connection Diagrams, Boot-
Procedures, Pin Descriptions, Etc.
AN298 - CS48500 Firmware User’s Manual
Includes detailed firmware design information
including signal processing flow diagrams and
control API information
DSP Composer User’s Manual
Includes detailed configuration and usage
information for the GUI development tool.
Table 1. CS48500 Related Documentation
The scope of the CS48500 Data Sheet is primarily the hardware specifications of the CS48500 family of
devices. This includes hardware functionality, characteristic data, pinout, and packaging information.
The intended audience for the CS48500 Data Sheet is the system PCB designer, mcu programmer, and
the quality control engineer.
DS734A3
©Copyright 2006 Cirrus Logic, Inc.
CONFIDENTIAL
5
5 Page 
CS48500 Data Sheet
32-bit Audio Decoder DSP Family
4.2.6 Hardware Watchdog Timer
The CS48500 has an integrated watchdog timer that acts as a “health” monitor for the DSP. The
watchdog timer must be reset by the DSP before the counter expires, or the entire chip is reset. This
peripheral ensures that the CS48500 will reset itself in the event of a temporary system failure. In stand-
alone mode (i.e. no host mcu), the DSP will reboot from external FLASH. In slave mode (i.e. host mcu
present) a GPIO will be used to signal the host that the watchdog has expired and the DSP should be
rebooted and re-configured.
4.3 DSP I/O Description
4.3.1 Multiplexed Pins
Many of the CS48500 pins are multi-functional. For details on pin functionality please refer to the
CS48500 Hardware User’s Manual.
4.3.2 Termination Requirements
Open-drain pins on the CS48500 must be pulled high for proper operation. Please refer to the CS48500
Hardware User’s Manual to identify which pins are open-drain and what value of pull-up resistor is
required for proper operation.
Mode select pins on the CS48500 are used to select the boot mode upon the rising edge from reset. A
detailed explanation of termination requirements for each communication mode select pin can be found
in the CS48500 Hardware User’s Manual.
4.3.3 Pads
The CS48500 I/Os operate from the 3.3 V supply and are 5 V tolerant.
4.4 Application Code Security
The external program code may be encrypted by the programmer to protect any intellectual property it
may contain. A secret, customer-specific key is used to encrypt the program code that is to be stored
external to the device. Please contact your local Cirrus representative for details.
DS734A3
©Copyright 2006 Cirrus Logic, Inc.
CONFIDENTIAL
11
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| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet CS48500.PDF ] | |
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