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PDF MK9173-01 Data sheet ( Hoja de datos )
| Número de pieza | MK9173-01 | |
| Descripción | (MK9173-01/-15) Video Genlock PLL | |
| Fabricantes | ICST | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
MK9173-01
MK9173-15
Video Genlock PLL
General Description
The MK9173-01 and MK9173-15 provide the analog PLL
circuit blocks to implement a frequency multiplier. Because
the device is configured to use an external divider in the PLL
clock feedback path, a large divider can be used to result in a
large frequency multiplication ratio. This is useful when using
a low frequency input clock to generate a high frequency
output clock. The MK9173-01/15 contains a phase detector,
charge pump, loop filter, and voltage-controlled oscillator
(VCO). The ICS674-01 can be used as the external feedback
divider.
A common application of the MK9173-01/-15 is the
implementation of a video genlock circuit. Because of this,
the MK9173-01/-15 inputs operate on the negative-going
clock edge.
Features
• Designed to replace the AV9173 in most applications
• Phase-detector/VCO circuit block
• Ideal for genlock system
• Reference clock range 12 kHz to 1M Hz for full
output clock range
• Output clock range 1.25 to 75 M Hz (-01), 0.625 to
37.5 MHz (-15), see Table 1 for conditions
• On-chip loop filter
• Single 5 volt power supply
• Low power CMOS technology
• Small 8-pin SOIC package
The MK9173-01/15 is pin and function compatible to the
AV9173-01/15. Please refer to page 4 regarding performance
differences. For new video genlock designs, please refer to the
ICS673-01, ICS1522 or ICS1523.
Block Diagram
Integrated Circuit Systems, Incorporated • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com
MDS 9173-01/15 B
121400
1 page  
MK9173- 01
MK9173-15
Absolute Maximum Ratings
VDD (referenced to GND) . . . . . . . . . . . . . . 7.0V
Operating Temperature under Bias . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . – 65°C to +150°C
Voltage on I/O pins referenced to GND . . . . . GND – 0.5V to VDD + 0.5V
Power Dissipation . . . . . . . . . . . . . . . . . . . . 0.5 watts
Stresses above those listed under Absolute Maximum Ratings above may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those listed in the operational sections
of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Electrical Characteristic
VDD = +5V ±5%, TA = 0°C to 70°C, unless otherwise stated
DC CHARACTERISTICS
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage1
Output High Voltage1
Output High Voltage1
Output High Voltage1
Supply Current
VIL
VIH
IIL
IIH
VOL
VOH1
VOH2
VOH3
IDD
VDD = 5V
VDD = 5V
VIN = 0V
VIN = VDD
IOL = 8mA
IOH = -1mA,
VDD = 5.0V
IOH = -4mA,
VDD = 5.0V
IOH = -8mA
Unloaded, 50 MHZ
—
2.0
-5
-5
—
VDD -0.4V
VDD -0.8V
2.4
—
—
—
—
—
—
—
—
—
20
0.8 V
—V
— µA
5 µA
0.4 V
—V
—V
—V
50 mA
Notes:
1. Duty cycle measured at 1.4V.
2. Input Reference Frequency = 25 kHz, Output Frequency = 25 MHz. Jitter measured between adjacent vertical pixels.
3. CLK1 frequency applies for FS = 0. For FS = 1 condition, divide allowable CLK1 range by the factor of 4.
Integrated Circuit Systems, Incorporated• 525 Race Street • San Jose •CA • 95126 • (408) 295-9800tel • www.icst.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MK9173-01.PDF ] | |
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