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PDF TMPR4925 Data sheet ( Hoja de datos )

Número de pieza TMPR4925
Descripción 64-Bit TX System RISC TX49 Family
Fabricantes Toshiba Semiconductor　
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TMPR4925 Hoja de datos, Descripción, Manual

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64-Bit TX System RISC
TX49 Family
TMPR4925
Rev. 1.0

1 page




TMPR4925 pdf
Handling precautions
Table of Contents
Table of Contents
TX4925
1. Features ...................................................................................................................................................................1-1
1.1 Outline ............................................................................................................................................................1-1
1.2 Features...........................................................................................................................................................1-2
1.2.1 TX49/H2 Processor Core Features ........................................................................................................1-2
1.2.2 TX4925 Peripheral Circuit Features ......................................................................................................1-3
2. Block Diagram ........................................................................................................................................................2-1
2.1 TX4925 Block Diagram .................................................................................................................................2-1
3. Signals .....................................................................................................................................................................3-1
3.1 Pin Signal Description ....................................................................................................................................3-1
3.1.1 Signals Common to SDRAM and External Bus Interfaces....................................................................3-1
3.1.2 SDRAM Interface Signals .....................................................................................................................3-2
3.1.3 External Interface Signals ......................................................................................................................3-3
3.1.4 DMA Interface Signals ..........................................................................................................................3-5
3.1.5 PCI Interface Signals .............................................................................................................................3-5
3.1.6 Serial I/O Interface Signals ....................................................................................................................3-7
3.1.7 Timer Interface Signals ..........................................................................................................................3-7
3.1.8 Parallel I/O Interface Signals .................................................................................................................3-7
3.1.9 AC-link Interface Signals.......................................................................................................................3-8
3.1.10 Interrupt Signals.....................................................................................................................................3-8
3.1.11 CHI Interface Signals.............................................................................................................................3-8
3.1.12 SPI Interface Signals..............................................................................................................................3-9
3.1.13 NAND Flash Memory Interface Signals................................................................................................3-9
3.1.14 Extended EJTAG Interface Signals........................................................................................................3-9
3.1.15 Clock Signals .......................................................................................................................................3-10
3.1.16 Initialization Signals ............................................................................................................................3-10
3.1.17 Test Signals ..........................................................................................................................................3-11
3.1.18 Power Supply Pins ...............................................................................................................................3-11
3.2 Boot Configuration .......................................................................................................................................3-12
3.3 Pin Multiplexing ...........................................................................................................................................3-16
4. Address Mapping ....................................................................................................................................................4-1
4.1 TX4925 Physical Address Map ......................................................................................................................4-1
4.2 Register Map ..................................................................................................................................................4-2
4.2.1 Addressing .............................................................................................................................................4-2
4.2.2 Ways to Access to Internal Registers .....................................................................................................4-2
4.2.3 Register Map..........................................................................................................................................4-3
5. Configuration Register ............................................................................................................................................5-1
5.1 Outline ............................................................................................................................................................5-1
5.1.1 Detecting G-Bus Timeout ......................................................................................................................5-1
5.2 Register...........................................................................................................................................................5-2
5.2.1 Chip Configuration Register (CCFG) 0xE000......................................................................................5-3
5.2.2 Chip Revision ID Register (REVID) 0xE004 ........................................................................................5-5
5.2.3 Pin Configuration Register (PCFG) 0xE008.........................................................................................5-6
5.2.4 Timeout Error Access Address Register (TOEA) 0xE00C ...................................................................5-8
5.2.5 Power Down Control Register (PDNCTR) 0xE010 .............................................................................5-9
5.2.6 GBUS Arbiter Priority Register (GARBP) 0xE018.............................................................................5-10
5.2.7 Timeout Count Register (TOCNT) 0xE020........................................................................................5-10
5.2.8 DMA Request Control Register (DRQCTR) 0xE024.........................................................................5-11
5.2.9 Clock Control Register (CLKCTR) 0xE028.......................................................................................5-12
5.2.10 GBUS Arbiter Control Register (GARBC) 0xE02C............................................................................5-14
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TMPR4925 arduino
Table of Contents
13.4.4 PIO Open Drain Control Register (XPI00D) 0xE50C .........................................................................13-6
14. AC-link Controller ................................................................................................................................................14-1
14.1 Features.........................................................................................................................................................14-1
14.2 Configuration................................................................................................................................................14-2
14.3 Functional Description..................................................................................................................................14-3
14.3.1 CODEC Connection.............................................................................................................................14-3
14.3.2 Boot Configuration ..............................................................................................................................14-4
14.3.3 Usage Flow ..........................................................................................................................................14-5
14.3.4 AC-link Start Up ..................................................................................................................................14-7
14.3.5 CODEC Register Access .....................................................................................................................14-8
14.3.6 Sample-data Transmission and Reception ...........................................................................................14-9
14.3.7 GPIO Operation .................................................................................................................................14-14
14.3.8 Interrupt .............................................................................................................................................14-15
14.3.9 AC-link Low-power Mode ................................................................................................................14-15
14.4 Registers .....................................................................................................................................................14-16
14.4.1 ACCTLEN Register 0xF700..............................................................................................................14-17
14.4.2 ACCTLDIS Register 0xF704 ............................................................................................................14-20
14.4.3 ACREGACC Register 0xF708 ..........................................................................................................14-22
14.4.4 ACINTSTS Register 0xF710 .............................................................................................................14-23
14.4.5 ACINTMSTS Register 0xF714 .........................................................................................................14-25
14.4.6 ACINTEN Register 0xF718 ..............................................................................................................14-25
14.4.7 ACINTDIS Register 0xF71C.............................................................................................................14-25
14.4.8 ACSEMAPH Register 0xF720 ..........................................................................................................14-26
14.4.9 ACGPIDAT Register 0xF740 ............................................................................................................14-27
14.4.10 ACGPODAT Register 0xF744...........................................................................................................14-28
14.4.11 ACSLTEN Register 0xF748 ..............................................................................................................14-29
14.4.12 ACSLTDIS Register 0xF74C.............................................................................................................14-31
14.4.13 ACFIFOSTS Register 0xF750 ...........................................................................................................14-32
14.4.14 ACDMASTS Register 0xF780 ..........................................................................................................14-34
14.4.15 ACDMASEL Register 0xF784 ..........................................................................................................14-35
14.4.16 ACAUDODAT Register 0xF7A0, ACSURRDAT Register 0xF7A4.................................................14-36
14.4.17 ACCENTDAT Register 0xF7A8, ACLFEDAT Register 0xF7AC,
ACMODODAT Register 0xF7B8......................................................................................................14-37
14.4.18 ACAUDIDAT Register 0xF7B0 ........................................................................................................14-38
14.4.19 ACMODIDAT Register 0xF7BC.......................................................................................................14-39
14.4.20 ACREVID Register 0xF7FC .............................................................................................................14-40
15. Interrupt Controller................................................................................................................................................15-1
15.1 Characteristics ..............................................................................................................................................15-1
15.2 Block Diagram..............................................................................................................................................15-2
15.3 Detailed Explanation ....................................................................................................................................15-4
15.3.1 Interrupt Sources..................................................................................................................................15-4
15.3.2 Interrupt Request Detection .................................................................................................................15-5
15.3.3 Interrupt Level Assigning ....................................................................................................................15-5
15.3.4 Interrupt Priority Assigning .................................................................................................................15-5
15.3.5 Interrupt Notification ...........................................................................................................................15-6
15.3.6 Clearing Interrupt Requests .................................................................................................................15-7
15.3.7 Interrupt Requests ................................................................................................................................15-7
15.4 Registers .......................................................................................................................................................15-8
15.4.1 Interrupt Detection Enable Register (IRDEN) 0xF600........................................................................15-9
15.4.2 Interrupt Detection Mode Register 0 (IRDM0) 0xF604 ....................................................................15-10
15.4.3 Interrupt Detection Mode Register 1 (IRDM1) 0xF608 ....................................................................15-12
15.4.4 Interrupt Level Register 0 (IRLVL0) 0xF610 ....................................................................................15-14
15.4.5 Interrupt Level Register 1 (IRLVL1) 0xF614 ....................................................................................15-15
15.4.6 Interrupt Level Register 2 (IRLVL2) 0xF618 ....................................................................................15-16
15.4.7 Interrupt Level Register 3 (IRLVL3) 0xF61C ...................................................................................15-17
15.4.8 Interrupt Level Register 4 (IRLVL4) 0xF620 ....................................................................................15-18
15.4.9 Interrupt Level Register 5 (IRLVL5) 0xF624 ....................................................................................15-19
vii

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