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L3924A 데이터시트 PDF




ST Microelectronics에서 제조한 전자 부품 L3924A은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 L3924A 기능
기능 (L3914A - L3934A) SPEECH AND 14 MEMORY DIALER
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L3924A 데이터시트, 핀배열, 회로
www.DataSheet4U.com
L3914A
L3924A - L3934A
SPEECH AND 14 MEMORY DIALER WITH HOLD FUNCTION
ADVANCE DATA
SPEECH CIRCUIT
2 TO 4 WIRES CONVERSION
PRESENT THE PROPER DC PATH FOR THE
LINE CURRENT AND THE FLEXIBILITY TO
ADJUST IT AND ALLOW PARALLEL PHONE
OPERATION
PROVIDES SUPPLY WITH LIMITED CUR-
RENT FOR EXTERNAL CIRCUITRY
SYMMETRICAL HIGH IMPEDANCE MICRO-
PHONE INPUTS SUITABLE FOR DYNAMIC
ELECTRET OR PIEZOELECTRIC
TRANSDUCER
ASYMMETRICAL EARPHONE OUTPUT
SUITABLE FOR DYNAMIC TRANSDUCER
LINE LOSS COMPENSATION
INTERNAL MUTING TO DISABLE SPEECH
DURING DIALING
HOLD FUNCTION FOR PARALLEL PHONE
WITH 400ms DELAY TO PREVENT FALSE
RELEASE
DIALER CIRCUIT
32 DIGITS FOR LAST NUMBER REDIAL
BUFFER
18 DIGITS FOR 13 MEMORY REDIAL
ALLOW MIXED MODE DIALING IN EITHER
TONE OR PULSE MODE
PACIFIER TONE PROVIDES AUDIBLE INDI-
CATION OF VALID KEY PRESSED IN A
BUZZER OR/AND IN THE EARPHONE
TIMED PABX PAUSE
FLASH INITIATES TIMED BREAK:
MASK OPTIONS WITH 585ms,300ms,100ms
CONTINUOUS TONE FOR EACH DIGIT UN-
TIL KEY RELEASE
USES INEXPENSIVE 3.579545MHz CE-
RAMIC RESONATOR
POWERED FROM TELEPHONE LINE, LOW
OPERATING VOLTAGE FOR LONG LOOP
APPLICATION
DIP28
SO28
ORDERING NUMBERS:
L3914AN
L3914AD
L3924AN
L3924AD
L3934AN
L3934AD
PIN CONNECTION (Top view)
KEYPAD CONFIGURATION
DESCRIPTION
The device consists of the speech and the dialer.
It provides the DC line interface circuit that termi-
nates the telephone line, analog amplifier for
speech transmission and necessary signals for
either DTMF or loop disconnect (pulse) dialing.
Note: PAUSE/LND:
PAUSE and LND functions are sharing the same key with different
sequence. Hereafter, PAUSE and LND keys arereferring to the same
key.
January 1995
1/15
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.




L3924A pdf, 반도체, 판매, 대치품
L3914A - L3924A - L3934A
FUNCTION PIN DESCRIPTION (continued)
IREF
Pin 13. An external resistor of 3.6kOhm con-
nected between IREF and GND will set the inter-
nal current level. Any change of this resistor value
will influence the microphone gain, DTMF gain,
earphone gain and sidetone.
VCC
Pin 14, VCC is the positive supply of the speech
network. It is stabilized by a decoupling capacitor
between VCC and GND. The VCC supply voltage
may also be used to supply external peripheral
circuits.
LED
Pin 15. The LED connected to this pin will start to
blink when the HOLD key is pressed and will turn
off if the HOLD key is pressed again. Otherwise, it
will continue to blink at 1Hz frequency when the
phone is on-hooked and then turn off when the
parallel phone goes off-hook.
ILI NE
Pin 16. A recommended external resistor of
20ohm is connected between ILINE and GND.
Changing this resistor value will have influence on
microphone gain, DTMF gain, sidetone, maximum
output swing on LN and on the DC characteristics
(especially in the low voltage region).
LN
Pin 17. LN is the positive line terminal of the device.
REG
Pin 18. The internal voltage regulator has to be
decoupled by a capacitor from REG) to GND).
The DC characteristics can be changed with an
external resistor connected between LN and REG
or between REG and ILINE .
GTX, MIC–, MIC+
GTX (pin 19), MIC– (pin 20) and MIC+ (pin 21).
The one chip phone has symmetrical microphone
inputs. The amplification from microphone inputs to
LN is 51.5dB and it can be adjusted between 43.5
and 51.5dB. The amplification is proportional to ex-
ternal resistor connected between GTX and REG.
GDTMF
Pin 22. When the DTMF input is enabled, the mi-
crophone inputs and the receive amplifier input will
be muted and the dialing tone will be sent to the
line. The voltage amplification from GDTMF to LN
4/15
is 40dB. Final output level on LN can be adjusted
via the external resistor connected between
GDTMF and GND through a decoupling capaci-
tor. A confidence tone is sent to the earphone
during tone dialing. The attenuation of the confi-
dence tone from LN to Vear is –32dB typically.
VDD
Pin 23. VDD is the positive supply for the dialing
network and must meet the maximum and mini-
mum voltage requirements.
DEVICE OPERATION
During on-hook all keypad inputs are high imped-
ance internally and it requires very low current for
memory retention. At anytime, Row and Column
inputs assume opposite states at off-hook. The
circuit verifies that a valid key has been entered
by alternately scanning the Row and Column in-
puts. If the input is still valid following 32ms of de-
bounce, the digit is stored into memory, and dial-
ing begins after a pre-signal delay of
approximately 40ms (measured from the initial
key closure). Output tone duration is shown in Ta-
ble 1.
The device allows manual dialing of an indefinite
number of digits, but if more than 32 digits are di-
aled, it will ”wrap around”. That is, the extra digits
beyond 32 will be stored at the beginning of LND
buffer, and the first 32 digits will no longer be
available for redial.
Table 2: DTMF Output Frequency
Key Input
ROW 1
ROW 2
ROW 3
ROW 4
COL 1
COL 2
COL 3
Stadard
Frequency
697
770
852
941
1209
1336
1477
Actual
Frequency
699.1
766.2
847.4
948.0
1215.9
1331.7
1471.9
% Deviation
+0.31
–0.49
–0.54
+0.74
+0.57
–0.32
–0.35
NORMAL DIALING
D1 D2 D3 ....etc
Normal dialing is straighforward, all keyboard en-
tries will be stored in the buffer and signaled in
succession.
PROGRAMMING AND REPORTORY DIALING
To program, enter the following:
PROG D1 D2 Dn MEM (location 0-9)
or
PROG D1
D2 Dn E1-E3
During programming, dialing is inhibited.

4페이지










L3924A 전자부품, 판매, 대치품
ABSOLUTE MAXIMUM RATINGS
Symbol
VLN
ILN
VDD
VI
Tamb
Tstg
Ptot
Parameter
Positive Line Voltage Continuous
Line Current
Logic Voltage
Maximum Voltage on Any Pin
Operating Temperature Range
Storage Temperature
Total Power Dissipation
L3914A - L3924A - L3934A
Value
12
140
7.0
GND(-0.3) VDD(+0.3)
-25 to +75
-40 to 125
700
Unit
V
mA
V
V
°C
°C
mW
ELECTRICAL CHARACTERISTICS (IL = 10 to 120mA; VDD = 3V; f = 1KHz; Tamb = 25°C, unless other-
wise specified)
Symbol
VLN
VDD
IDD
ICC
ILED
VMR
IMR
IS
IPL
IPO
VIL
VIH
GTX
AGTX
DTX
NTX
ZMIC
GDTMF
CDTMF
Parameter
Line Voltage
Logic Voltage)
Supply Current Into VDD
Supply Current Into VCC
Supply Current to HOLD LED
Memory Retention Voltage
Memory Retention Current
Off-Hook Stand-by Current
Pulse Output Sink Current
Pacifier Tone Sink/Source
Current
HKS, Mode, Keyboard Inputs
Low
HKS, Mode, Keyboard Inputs
High
Transmit Gain
Transmit Gain Variation with
RGTX
Transmit Distortion
Transmit Noise
Microphone Input Impedance
DTMF Gain (Output @ LN)
Confidence Tone Level
Ve ar/VLN
Test Condition
IL = 4mA
IL = 15mA
IL = 120mA
RA = 68K; IL = 15mA
RB = 39K; IL = 15mA
TONE MODE
PULSE MODE
TONE MODE
PULSE MODE
IL = 15mA
IL = 15mA
IL = 120mA
VDD = 4.0V
VO = 0.5V
VO = 0.5V (Sink)
VO = 2.5V (Source)
Vmic = 2mVrms
IL = 15mA; RGTX = 68K
IL = 60mA; RGTX = 68K
IL = 15mA
Vmic = 2mVrms
RGTX = 43K
RGTX = 27K
IL = 15mA; VLN = 1Vrms
IL = 15mA; Vmic = 0V
IL = 15mA ; RDTMF = 2.25K
Min.
3.15
2.50
2.20
1.50
1.00
1
0.6
Typ.
3.50
3.2
4.1
600
400
1.30
4
30
150
3.00
3
1
Max. Unit
2.50
3.85
7.0
V
V
V
V
V
6.00
6.00
V
V
µA
µA
mA
mA
mA
V
1.00 µA
250 µA
mA
mA
mA
0.3xVDD V
Fig.
3
3
3
3
3
4
4
3
3
3
-
0.7xVDD
V-
50.0
44.5
–8
51.5
46.5
53.0
48.5
0
dB
dB
dB
6
6
– 4 dB
– 8 dB
2 %6
–72 dBmp 6
64 K5
38 40 42 dB 7
–34 –32 –30 dB 7
7/15

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관련 데이터시트

부품번호상세설명 및 기능제조사
L3924A

(L3914A - L3934A) SPEECH AND 14 MEMORY DIALER

ST Microelectronics
ST Microelectronics

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