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PDF ATA6831 Data sheet ( Hoja de datos )
| Número de pieza | ATA6831 | |
| Descripción | Triple Half-bridge Driver with SPI and PWM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Supply Voltage up to 40V
• RDSon Typically 0.8Ω at 25°C, Maximum 1.5Ω at 150°C
• Up to 1.0A Output Current
• Three Half-bridge Outputs Formed by Three High-side and Three Low-side Drivers
• Capable of Switching Loads such as DC Motors, Bulbs, Resistors, Capacitors, and
Inductors
• PWM Capability up to 25 kHz for Each High-side Output Controlled by External PWM
Signal
• No Shoot-through Current
• Very Low Quiescent Current IS < 5 µA in Standby Mode over Total Temperature Range
• Outputs Short-circuit Protected
• Selective Overtemperature Protection for Each Switch and Overtemperature
Prewarning
• Undervoltage Protection
• Various Diagnostic Functions such as Shorted Output, Open Load, Overtemperature
and Power-supply Fail Detection
• Serial Data Interface, Daisy Chain Capable, up to 2 MHz Clock Frequency
• QFN18 Package
Triple
Half-bridge
Driver with SPI
and PWM
ATA6831
1. Description
The ATA6831 provides fully protected driver interfaces designed in SOI technology.
They are used to allow a microcontroller to control up to 3 different loads in automo-
tive and industrial applications.
Each of the 3 high-side and 3 low-side drivers is capable of driving currents up to
1.0A. Due to the enhanced PWM signal (up to 25 kHz) it is possible to generate a
smooth control of, for example, a DC motor without any noise. The drivers are inter-
nally connected to form 3 half-bridges and can be controlled separately from a
standard serial data interface, enabling all kinds of loads, such as bulbs, resistors,
capacitors and inductors, to be combined. The IC design especially supports the
application of H-bridges to drive DC motors.
Protection is guaranteed with respect to short-circuit conditions, overtemperature and
undervoltage. Various diagnostic functions and a very low quiescent current in
standby mode enable a wide range of applications. Automotive qualification (protec-
tion against conducted interferences, EMC protection and 2-kV ESD protection) gives
added value and enhanced quality for exacting requirements of automotive
applications.
4908D–AUTO–09/06
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ATA6831
Table 3-2. Output Data Protocol
Output (Status)
Bit
Register
Function
0 TP Temperature prewarning: high = warning
Normal operation: high = output is on, low = output is off
1
Status LS1
Open-load detection: high = open load, low = no open load
(correct load condition is detected if the corresponding output is
switched off); not affected by SRR
Normal operation: high = output is on, low = output is off
2
Status HS1
Open-load detection: high = open load, low = no open load
(correct load condition is detected if the corresponding output is
switched off); not affected by SRR
3
Status LS2
Description see LS1
4
Status HS2
Description see HS1
5
Status LS3
Description see LS1
6
Status HS3
Description see HS1
7 n. u. Not used
8 n. u. Not used
9 n. u. Not used
10 n. u. Not used
11 n. u. Not used
12 n. u. Not used
Over-load detected: set high, when at least one output is switched off
13 OVL by a short-circuit condition or an overtemperature event. Bits 1 to 6 can
be used to detect the affected switch
14
INH
Inhibit: this bit is controlled by software (bit SI in input register)
High = standby, low = normal operation
15 PSF Power-supply fail: undervoltage at pin VS detected
4908D–AUTO–09/06
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ATA6831
8. Electrical Characteristics (Continued)
7.5V < VS < 40V; 4.75V < VCC < 5.25V; INH = High; –40°C < Tj < 150°C; unless otherwise specified, all values refer to GND pins.
No. Parameters
Test Conditions
Pin Symbol Min. Typ. Max. Unit Type*
4.15
4.16
4.17
4.18
4.19
High-side output switch VVS = 13V
on delay(1),(2)
RLoad = 30Ω
Low-side output switch VVS = 13V
on delay(1),(2)
RLoad = 30Ω
High-side output switch VVS =13V
off delay(1),(2)
RLoad = 30Ω
Low-side output switch VVS =13V
off delay(1),(2)
RLoad = 30Ω
Dead time between
corresponding
VVS =13V
high-side and low-side RLoad = 30Ω
switches
tdon
tdon
tdoff
tdoff
tdon – tdoff
1
20 µs A
20 µs A
20 µs A
3 µs A
µs A
4.20
4.21
5
∆tdPWM
low-side switch(3)
VVS = 13V
RLoad = 30Ω
∆tdPWM
high-side switch(3)
VVS = 13V
RLoad = 30Ω
Logic Inputs DI, CLK, CS, PWM
∆tdPWM =
tdon – tdoff
∆tdPWM =
tdon – tdoff
3
20 µs A
7 µs A
5.1
Input voltage low-level
threshold
5.2
Input voltage high-level
threshold
5.3
Hysteresis of input
voltage
3, 4, 5,
6
3, 4, 5,
6
3, 4, 5,
6
VIL
VIH
∆VI
0.3 ×
VVCC
50
0.7 ×
VVCC
700
V
V
mV
A
A
A
5.4
Pull-down current
pins DI, CLK, PWM
VDI, VCLK, VPWM = VCC 4, 5, 6
IPD
10
65 µA A
5.5
Pull-up current
pin CS
VCS = 0V
3 IPU –65
–10 µA
A
6 Serial Interface – Logic Output DO
6.1 Output-voltage low level IDOL = 2 mA
6.2
Output-voltage high
level
IDOL = –2 mA
7 VDOL
7
VDOH
VVCC –
0.7V
0.4 V
V
A
A
6.3
Leakage current
(tri-state)
VCS = VCC
0V < VDO < VVCC
7 Inhibit Input – Timing
7 IDO –10
10 µA A
Delay time from
7.1 standby to normal
operation
tdINH
100 µs
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Notes: 1. Delay time between rising edge of input signal at pin CS after data transmission and switch on/off output stages to 90% of
final level. Device not in standby for t > 1 ms.
2. Delay time between rising/falling edge of input signal at pin PWM and switch on/off output stages to 90% of final level.
3. Difference between switch-on and switch-off delay time of input signal at pin PWM to output stages in PWM mode.
4908D–AUTO–09/06
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ATA6831.PDF ] | |
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