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XRT86VL34 데이터시트 PDF




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부품번호 XRT86VL34 기능
기능 QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
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XRT86VL34 데이터시트, 핀배열, 회로
xr
www.DataSheet4U.com
PRELIMINARY
XRT86VL34
JULY 2005
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
REV. P1.0.5
GENERAL DESCRIPTION
The XRT86VL34 is a four-channel 1.544 Mbit/s or
2.048 Mbit/s DS1/E1/J1 framer and LIU integrated
solution featuring R3 technology (Relayless,
Reconfigurable, Redundancy). The physical
interface is optimized with internal impedance, and
with the patented pad structure, the XRT86VL34
provides protection from power failures and hot
swapping.
The XRT86VL34 contains an integrated DS1/E1/J1
framer and LIU which provide DS1/E1/J1 framing and
error accumulation in accordance with ANSI/ITU_T
specifications. Each framer has its own framing
synchronizer and transmit-receive slip buffers. The
slip buffers can be independently enabled or disabled
as required and can be configured to frame to the
common DS1/E1/J1 signal formats.
Each Framer block contains its own Transmit and
Receive T1/E1/J1 Framing function. There are 3
Transmit HDLC controllers per channel which
encapsulate contents of the Transmit HDLC buffers
into LAPD Message frames. There are 3 Receive
HDLC controllers per channel which extract the
payload content of Receive LAPD Message frames
from the incoming T1/E1/J1 data stream and write the
contents into the Receive HDLC buffers. Each framer
also contains a Transmit and Overhead Data Input
port, which permits Data Link Terminal Equipment
direct access to the outbound T1/E1/J1 frames.
Likewise, a Receive Overhead output data port
permits Data Link Terminal Equipment direct access
to the Data Link bits of the inbound T1/E1/J1 frames.
The XRT86VL34 fully meets all of the latest T1/E1/J1
specifications: ANSI T1/E1.107-1988, ANSI T1/
E1.403-1995, ANSI T1/E1.231-1993, ANSI T1/
E1.408-1990, AT&T TR 62411 (12-90) TR54016, and
ITU G-703, G.704, G706 and G.733, AT&T Pub.
43801, and ETS 300 011, 300 233, JT G.703, JT
G.704, JT G706, I.431. Extensive test and diagnostic
functions include Loop-backs, Boundary scan,
Pseudo Random bit sequence (PRBS) test pattern
generation, Performance Monitor, Bit Error Rate
(BER) meter, forced error insertion, and LAPD
unchannelized data payload processing according to
ITU-T standard Q.921.
Applications and Features (next page)
FIGURE 1. XRT86VL34 4-CHANNEL DS1 (T1/E1/J1) FRAMER/LIU COMBO
Local PCM
Highway
XRT86VL34
1 of 4-channels
Tx Serial
Clock
Tx Serial
Data In
Rx Serial
Clock
Rx Serial
Data Out
PRBS
Generator &
Analyser
External Data
Link Controller
Tx Overhead In
Rx Overhead Out
2-Frame
Slip Buffer
Elastic Store
Tx Framer
2-Frame
Slip Buffer
Elastic Store
Rx Framer
Performance
Monitor
HDLC/LAPD
Controllers
Tx LIU
Interface
LLB LB
Rx LIU
Interface
LIU &
Loopback
Control
TTIP
TRING
RTIP
RRING
8kHz sync
OSC
Back Plane
1.544-16.384 Mbit/s
Signaling &
Alarms
System (Terminal) Side
TxON
JTAG
DMA
Interface
Microprocessor
Interface
INT
Memory
D[7:0]
3
A[13:0]
µP
Select
Intel/Motorola µP
Configuration, Control &
Status Monitor
4 WR
ALE_AS
RD
RDY_DTACK
1:2 Turns Ratio
1:1 Turns Ratio
RxLOS
Line Side
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com




XRT86VL34 pdf, 반도체, 판매, 대치품
XRT86VL34
PRELIMINARY
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
LIST OF PARAGRAPHS
xr
REV. P1.0.5
1.0 REGISTER DESCRIPTIONS - E1 MODE ................................................................................................9
2.0 LINE INTERFACE UNIT (LIU SECTION) REGISTERS .......................................................................143
I

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XRT86VL34 전자부품, 판매, 대치품
xr
PRELIMINARY
QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL34
REV. P1.0.5
TABLE 67: RECEIVE USER CODE REGISTER 0-31 (RUCR 0-31)
HEX ADDRESS: 0XN380 TO 0XN39F ..................... 84
TABLE 68: RECEIVE SIGNALING CONTROL REGISTER 0-31 (RSCR 0-31)
HEX ADDRESS: 0XN3A0 TO 0XN3BF ...................... 85
TABLE 69: RECEIVE SUBSTITUTION SIGNALING REGISTER 0-31 (RSSR 0-31) HEX ADDRESS 0XN3C0 TO 0XN3DF ...................... 87
TABLE 70: RECEIVE SIGNALING ARRAY REGISTER 0 - 31 (RSAR 0-31)
HEX ADDRESS: 0XN500 TO 0XN51F ...................... 88
TABLE 71: LAPD BUFFER 0 CONTROL REGISTER (LAPDBCR0)
HEX ADDRESS: 0XN600 TO 0XN660...................... 89
TABLE 72: LAPD BUFFER 1 CONTROL REGISTER (LAPDBCR1)
HEX ADDRESS: 0XN700 TO 0XN760...................... 89
TABLE 73: PMON RECEIVE LINE CODE VIOLATION COUNTER MSB (RLCVCU)
HEX ADDRESS: 0XN900 ....................... 90
TABLE 74: PMON RECEIVE LINE CODE VIOLATION COUNTER LSB (RLCVCL)
HEX ADDRESS: 0XN901 ....................... 90
TABLE 75: PMON RECEIVE FRAMING ALIGNMENT BIT ERROR COUNTER MSB (RFAECU) HEX ADDRESS: 0XN902 ....................... 91
TABLE 76: PMON RECEIVE FRAMING ALIGNMENT BIT ERROR COUNTER LSB (RFAECL) HEX ADDRESS: 0XN903........................ 91
TABLE 77: PMON RECEIVE SEVERELY ERRORED FRAME COUNTER (RSEFC)
HEX ADDRESS: 0XN904 ........................ 92
TABLE 78: PMON RECEIVE CRC-4 BIT ERROR COUNTER - MSB (RSBBECU)
HEX ADDRESS: 0XN905 ........................ 92
TABLE 79: PMON RECEIVE CRC-4 BLOCK ERROR COUNTER - LSB (RSBBECL)
HEX ADDRESS: 0XN906 ........................ 92
TABLE 80: PMON RECEIVE FAR-END BLOCK ERROR COUNTER - MSB (RFEBECU)
HEX ADDRESS: 0XN907....................... 93
TABLE 81: PMON RECEIVE FAR END BLOCK ERROR COUNTER -LSB (RFEBECL)
HEX ADDRESS: 0XN908 ........................ 93
TABLE 82: PMON RECEIVE SLIP COUNTER (RSC)
HEX ADDRESS: 0XN909 ..................... 94
TABLE 83: PMON RECEIVE LOSS OF FRAME COUNTER (RLFC)
HEX ADDRESS: 0XN90A ...................... 94
TABLE 84: PMON RECEIVE CHANGE OF FRAME ALIGNMENT COUNTER (RCFAC)
HEX ADDRESS: 0XN90B ....................... 94
TABLE 85: PMON LAPD FRAME CHECK SEQUENCE ERROR COUNTER 1 (LFCSEC1)
HEX ADDRESS: 0XN90C....................... 95
TABLE 86: PMON PRBS BIT ERROR COUNTER MSB (PBECU)
HEX ADDRESS: 0XN90D ................... 95
TABLE 87: PMON PRBS BIT ERROR COUNTER LSB (PBECL)
HEX ADDRESS: 0XN90E................... 95
TABLE 88: PMON TRANSMIT SLIP COUNTER (TSC)
HEX ADDRESS: 0XN90F .................... 96
TABLE 89: PMON EXCESSIVE ZERO VIOLATION COUNTER MSB (EZVCU)
HEX ADDRESS: 0XN910 ....................... 96
TABLE 90: PMON EXCESSIVE ZERO VIOLATION COUNTER LSB (EZVCL)
HEX ADDRESS: 0XN911 ....................... 96
TABLE 91: PMON FRAME CHECK SEQUENCE ERROR COUNTER 2 (LFCSEC2)
HEX ADDRESS: 0XN91C ....................... 97
TABLE 92: PMON FRAME CHECK SEQUENCE ERROR COUNTER 3 (LFCSEC3)
HEX ADDRESS: 0XN92C ....................... 97
TABLE 93: BLOCK INTERRUPT STATUS REGISTER (BISR)
HEX ADDRESS: 0XNB00 ........................ 98
TABLE 94: BLOCK INTERRUPT ENABLE REGISTER (BIER)
HEX ADDRESS: 0XNB01 ...................... 100
TABLE 95: ALARM & ERROR INTERRUPT STATUS REGISTER (AEISR)
HEX ADDRESS: 0XNB02 ...................... 102
TABLE 96: ALARM & ERROR INTERRUPT ENABLE REGISTER (AEIER)
HEX ADDRESS: 0XNB03 ...................... 105
TABLE 97: FRAMER INTERRUPT STATUS REGISTER (FISR)
HEX ADDRESS: 0XNB04 ................... 107
TABLE 98: FRAMER INTERRUPT ENABLE REGISTER (FIER)
HEX ADDRESS: 0XNB05 .................... 110
TABLE 99: DATA LINK STATUS REGISTER 1 (DLSR1)
HEX ADDRESS: 0XNB06 ..................... 112
TABLE 100: DATA LINK INTERRUPT ENABLE REGISTER 1 (DLIER1)
HEX ADDRESS: 0XNB07 ..................... 114
TABLE 101: SLIP BUFFER INTERRUPT STATUS REGISTER (SBISR)
HEX ADDRESS: 0XNB08 ................. 116
TABLE 102: SLIP BUFFER INTERRUPT ENABLE REGISTER (SBIER)
HEX ADDRESS: 0XNB09 ..................... 119
TABLE 103: RECEIVE LOOPBACK CODE INTERRUPT AND STATUS REGISTER (RLCISR) HEX ADDRESS: 0XNB0A ...................... 121
TABLE 104: RECEIVE LOOPBACK CODE INTERRUPT ENABLE REGISTER (RLCIER)
HEX ADDRESS: 0XNB0B .................... 123
TABLE 105: RECEIVE SA INTERRUPT STATUS REGISTER (RSAISR)
HEX ADDRESS: 0XNB0C .................. 124
TABLE 106: RECEIVE SA INTERRUPT ENABLE REGISTER (RSAIER)
HEX ADDRESS: 0XNB0D ................... 127
TABLE 107: EXCESSIVE ZERO STATUS REGISTER (EXZSR)
HEX ADDRESS: 0XNB0E ................. 130
TABLE 108: EXCESSIVE ZERO ENABLE REGISTER (EXZER)
HEX ADDRESS: 0XNB0F ................... 131
TABLE 109: RXLOS/CRC INTERRUPT STATUS REGISTER (RLCISR)
HEX ADDRESS: 0XNB12 ................. 132
TABLE 110: RXLOS/CRC INTERRUPT ENABLE REGISTER (RLCIER)
HEX ADDRESS: 0XNB13 .................. 134
TABLE 111: DATA LINK STATUS REGISTER 2 (DLSR2)
HEX ADDRESS: 0XNB16 ..................... 135
TABLE 112: DATA LINK INTERRUPT ENABLE REGISTER 2 (DLIER2)
HEX ADDRESS: 0XNB17 .................... 137
TABLE 113: DATA LINK STATUS REGISTER 3 (DLSR3)
HEX ADDRESS: 0XNB26 ..................... 139
TABLE 114: DATA LINK INTERRUPT ENABLE REGISTER 3 (DLIER3)
HEX ADDRESS: 0XNB27 ................... 141
TABLE 115: LIU CHANNEL CONTROL REGISTER 0 (LIUCCR0)
HEX ADDRESS: 0X0FN0.................. 143
TABLE 116: EQUALIZER CONTROL AND TRANSMIT LINE BUILD OUT ............................................................................................... 145
TABLE 117: LIU CHANNEL CONTROL REGISTER 1 (LIUCCR1)
HEX ADDRESS: 0X0FN1.................. 146
TABLE 118: LIU CHANNEL CONTROL REGISTER 2 (LIUCCR2)
HEX ADDRESS: 0X0FN2.................. 148
TABLE 119: LIU CHANNEL CONTROL REGISTER 3 (LIUCCR3)
HEX ADDRESS: 0X0FN3.................. 150
TABLE 120: LIU CHANNEL CONTROL INTERRUPT ENABLE REGISTER (LIUCCIER)
HEX ADDRESS: 0X0FN4................... 152
TABLE 121: LIU CHANNEL CONTROL STATUS REGISTER (LIUCCSR)
HEX ADDRESS: 0X0FN5 .................... 153
TABLE 122: LIU CHANNEL CONTROL INTERRUPT STATUS REGISTER (LIUCCISR)
HEX ADDRESS: 0X0FN6.................... 156
TABLE 123: LIU CHANNEL CONTROL CABLE LOSS REGISTER (LIUCCCCR)
HEX ADDRESS: 0X0FN7 .................... 158
TABLE 124: LIU CHANNEL CONTROL ARBITRARY REGISTER 1 (LIUCCAR1)
HEX ADDRESS: 0X0FN8 .................... 158
TABLE 125: LIU CHANNEL CONTROL ARBITRARY REGISTER 2 (LIUCCAR2)
HEX ADDRESS: 0X0FN9 .................... 158
TABLE 126: LIU CHANNEL CONTROL ARBITRARY REGISTER 3 (LIUCCAR3)
HEX ADDRESS: 0X0FNA .................... 159
TABLE 127: LIU CHANNEL CONTROL ARBITRARY REGISTER 4 (LIUCCAR4)
HEX ADDRESS: 0X0FNB .................... 159
TABLE 128: LIU CHANNEL CONTROL ARBITRARY REGISTER 5 (LIUCCAR5)
HEX ADDRESS: 0X0FNC.................... 159
TABLE 129: LIU CHANNEL CONTROL ARBITRARY REGISTER 6 (LIUCCAR6)
HEX ADDRESS: 0X0FND.................... 160
TABLE 130: LIU CHANNEL CONTROL ARBITRARY REGISTER 7 (LIUCCAR7)
HEX ADDRESS: 0X0FNE .................... 160
TABLE 131: LIU CHANNEL CONTROL ARBITRARY REGISTER 8 (LIUCCAR8)
HEX ADDRESS: 0X0FNF .................... 160
TABLE 132: LIU GLOBAL CONTROL REGISTER 0 (LIUGCR0)
HEX ADDRESS: 0X0FE0 .................. 161
IV

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