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Número de pieza | LM4937 | |
Descripción | Audio Sub-System | |
Fabricantes | National Semiconductor | |
Logotipo | ||
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February 2007
LM4937
Audio Sub-System with OCL Stereo Headphone Output
and RF Suppression
General Description
The LM4937 is an integrated audio sub-system designed for
mono voice, stereo music cell phones connecting to base
band processors with mono differential analog voice paths.
Operating on a 3.3V supply, it combines a mono speaker am-
plifier delivering 520mW into an 8Ω load, a stereo headphone
amplifier delivering 36mW per channel into a 32Ω load, and
a mono earpiece amplifier delivering 55mW into a 32Ω load.
It integrates the audio amplifiers, volume control, mixer, and
power management control all into a single package. In ad-
dition, the LM4937 routes and mixes the single-ended stereo
and differential mono inputs into multiple distinct output
modes. The LM4937 features an I2S serial interface for full
range audio and an I2C or SPI compatible interface for control.
The full range music path features an SNR of 85dB with an
18-bit 48kHz input.
Boomer audio power amplifiers are designed specifically to
provide high quality output power with a minimal amount of
external components.
Key Specifications
■ POUT, BTL, 8Ω, 3.3V, 1%
■ POUT H/P, 32Ω, 3.3V, 1%
■ POUT Mono Earpiece, 32Ω, 1%
■ Shutdown current
■ SNR (DAC + Amplifier)
520mW (typ)
36mW (typ)
55mW (typ)
0.6µA (typ)
85dB (typ)
Features
■ 18-bit stereo DAC
■ Multiple distinct output modes
■ Mono speaker amplifier
■ Stereo headphone amplifier
■ Mono earpiece amplifier
■ Differential mono analog input
■ Independent loudspeaker, headphone and mono earpiece
volume controls
■ I2C/SPI (selectable) compatible interface
■ Ultra low shutdown current
■ Click and Pop Suppression circuit
Applications
■ Cell Phones
■ PDAs
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 202020
www.national.com
1 page Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Analog Supply Voltage
Digital Supply Voltage
Storage Temperature
Input Voltage
Power Dissipation (Note 3)
ESD Susceptibility (Note 4)
ESD Susceptibility (Note 5)
Junction Temperature
6.0V
6.0V
-65°C to +150°C
-0.3V to VDD +0.3V
Internally Limited
2000V
200V
150°C
Thermal Resistance
θJA (TLA36)
See AN-1279
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
Supply Voltage
100°C/W
−40°C ≤ TA ≤ +85°C
2.7V ≤ AVDD ≤ 5.5V
2.7V ≤ DVDD ≤ 4.0V
2.4V ≤ I2CVDD ≤ 4.0V
Audio Amplifier Electrical Characteristics AVDD = 3.0V, DVDD = 3.0V (Notes 1, 2)
The following specifications apply for the circuit shown in Figure 1 with all programmable gain set at 0dB, unless otherwise specified.
Limits apply for TA = 25°C.
Symbol
Parameter
Conditions
LM4937
Typical Limits
(Note 6) (Notes 7, 8)
Units
(Limits)
VIN = 0, No Load
All Amps On + DAC, OCL (Note 11)
14 19 mA (max)
Headphone Mode Only, OCL
4.6 6.25 mA (max)
IDD Supply Current
Mono Loudspeaker Mode Only (Note 11)
Mono Earpiece Speaker Mode Only
7
11.5 mA (max)
D_6 = 0 (register 01h)
3.7 5 mA (max)
D_6 = 1
3.3 mA
DAC Off, All Amps On (OCL) (Note 11) 10 15.5 mA (max)
ISD Shutdown Current
Speaker; THD = 1%;
f = 1kHz, 8Ω BTL
0.6 2 μA (max)
420 370 mW (min)
PO Output Power
Headphone; THD = 1%;
f = 1kHz, 32Ω SE
mW (min)
27 24
Earpiece; THD = 1%;
f = 1kHz, 32Ω BTL
mW (min)
45 40
VFS DAC
Full Scale DAC Output
Speaker; PO = 200mW;
f = 1kHz, 8Ω BTL
2.4 Vpp
0.04 %
THD+N
Total Harmonic Distortion
Headphone; PO = 10mW;
f = 1kHz, 32Ω SE
0.01
%
Earpiece; PO = 20mW;
f = 1kHz, 32Ω BTL
0.04 %
Speaker
10 55 mV (max)
VOS Offset Voltage
Earpiece
Headphone (OCL)
8 50 mV (max)
8 40 mV (max)
∈O Output Noise
A = weighted; 0dB gain;
See Table 1
Table 1
PSRR
Xtalk
Power Supply Rejection Ratio
Crosstalk
f = 217Hz; Vripple = 200mVP-P
CB = 2.2μF; See Table 2
Headphone; PO= 10mW
f = 1kHz; OCL
Table 2
–60
dB
TWU
CMRR
Wake-Up Time
Common-Mode Rejection Ratio
CB = 2.2μF, CD6 = 0
CB = 2.2μF, CD6 = 1
f = 217Hz, VRMS = 200mVpp
35
85
56
ms (max)
ms (max)
dB
5 www.national.com
5 Page Two Wire Mode Write Bus Timing
FIGURE 3. Two Wire Mode Write Bus
20202062
When the part is configured as an I2C device then the LM4937 will respond to one of two addresses, according to the ADDR input.
If ADDR is low then the address portion of the I2C transaction should be set to write to 0010000. When ADDR is high then the
address input should be set to write to 1110000.
Chip Address
ADR = 0
ADR = 1
A7 A6
0 EC
00
01
EC — Externally configured by ADR pin
TABLE 5. Chip Address
A5 A4
EC 1
01
11
A3
0
0
0
A2 A1 A0
000
000
000
11 www.national.com
11 Page |
Páginas | Total 40 Páginas | |
PDF Descargar | [ Datasheet LM4937.PDF ] |
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