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PDF BU2381FV Data sheet ( Hoja de datos )

Número de pieza BU2381FV
Descripción Multimedia ICs Clock generator
Fabricantes ROHM Semiconductor 
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No Preview Available ! BU2381FV Hoja de datos, Descripción, Manual

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Multimedia ICs
BU2381FV
Clock generator for digital still camera
BU2381FV
BU2381FV is a high-performance 3-channel PLL IC. PLL circuit generates necessary clocks by inputting standard clocks
of crystal oscillator from outside. Changing a connection of wire can generate any clocks required for any applications of
users. Jitter and S/N characteristic has achieved almost the same high-quality sound and vision as oscillating module
because of optimization of PLL. Frequency can be changed by the internal dividing control.
zApplications
Digital still camera
zFeatures
1) Generate clocks for video output, CDS, USB from standard
clock input
2) No external elements required for PLL
3) Standard clocks apply to two kinds of NTSC/PAL
4) Single power supply of 3.3V operating
5) SSOP-B16 small package
zExternal dimensions (Unit : mm)
5.0±0.2
16 9
18
0.15±0.1
0.65 0.1
0.22±0.1
SSOP-B16
zAbsolute maximum ratings (Ta=25°C)
Parameter
Symbol
Limits
Applied voltage
VDD 0.5 to +7.0
Input voltage
VIN 0.5 to VDD+0.5
Storage temperature range
Power dissipation
Tstg
Pd
30 to +125
450
Derating : 4.5mW/°C for operating above Ta=25°C
An operation is not guaranteed.
Radiation resistance design is not used.
Power dissipation is measured when BU2381FV is placed on the board.
Unit
V
V
°C
mW
zRecommended operating conditions (Ta=25°C)
Parameter
Symbol Min. Typ.
Max.
Supply voltage
VDD 3.0 3.6
Input "H" voltage range
VIH 0.8VDD
VDD
Input "L" voltage range
VIL 0 0.2VDD
Operation temperature range
Topr
5
70
Output maximum load
CL − − 15
Unit
V
V
V
°C
pF
1/5

1 page




BU2381FV pdf
Multimedia ICs
zApplication example
REFCLK output
FS3 H or L
0.1µF
FS2 H or L
1
2
3
4
5
6
7
8
BU2381FV
16
0.1µF
15
CLK2 output
14
13
0.1µF
12
CLK2 ON H or L
11
FS1 H or L
10
CLK1 output
9
Note) The BU2381FV is placed on the board normally.
A decoupling capacitor (0.1µF) needs to be placed between pin2 and pin4, pin13 and pin12, pin16 and pin15.
The decoupling capacitor is an close to the above pins as possible.
5/5

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