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PDF 21143 Data sheet ( Hoja de datos )
| Número de pieza | 21143 | |
| Descripción | PCI/CardBus 10/100 Ethernet LAN Controller | |
| Fabricantes | Intel Corporation | |
| Logotipo |  |
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21143 PCI/CardBus 10/100 Ethernet LAN
Controller
Networking Silicon
Preliminary Datasheet
Product Features
s Fully compliant with Revision 2.1 of the
PCI Local Bus Specification and with
Revision 1.0 of the PCI Bus Power
Management Interface Specification.
s Fully compliant with Revision 1.0 of the
Advanced Configuration and Power
Interface (ACPI) Specification and with
Revision 1.0 of the Network Device Class
Power Management Specification, under
the OnNow Architecture for Microsoft’s
PC 97 Hardware Design Guide and PC 98
System Design Guide.
s Supports IEEE 802.3 with full
Auto-Negotiation algorithm of full-duplex
and half-duplex operation for 10 Mb/s and
100 Mb/s (NWAY).
s Supports IEEE 802.3 and ANSI 8802-3
Ethernet standards.
s Supports direct memory access (DMA) and
has direct interface to both the CardBus*
and PCI local bus.
s Provides glueless 32-bit PCI bus master
interface.
s Contains large independent receive and
transmit FIFOs.
s Contains internal PCS and scrambler/
descrambler for MII/SYM interface for
100BASE-TX.
s Contains onchip integrated AUI port and a
10BASE-T transceiver.
s Supports autodetection between
10BASE-T, AUI, and MII/SYM ports.
s Provides an upgradable boot ROM
interface up to 256KB.
s Supports remote wake-up-LAN and Magic
Packet* with the SecureON™ password
option.
s Supports PCI/CardBus clock speed
frequency from dc to 33 MHz; network
operation with PCI clock from 20 MHz to
33 MHz.
s Implements low-power management with
two power-saving modes (sleep and
snooze).
s Implements low-power, 3.3-V CMOS
technology.
Notice: This document contains preliminary information on new products in production. The
specifications are subject to change without notice. Verify with your local Intel sales office that
you have the latest datasheet before finalizing a design.
Order Number: 278073-001
November 1998
1 page  
1.0
21143
21143 Overview
The Intel 21143 PCI/CardBus* 10/100-Mb/s Ethernet LAN Controller (21143) supports the
peripheral component interconnect (PCI) bus or CardBus. It provides a direct interface connection
to the PCI bus and adapts easily to the CardBus and most other standard buses. The 21143 software
interface and data structures are optimized to minimize the host CPU load and to allow for
maximum flexibility in the buffer descriptor management. The 21143 contains large onchip FIFOs,
so no additional onboard memory is required. The 21143 also provides an upgradable boot ROM
interface.
In addition to the features listed on the title pages, the following features are also supported by the
21143:
PCI and CardBus Features:
• Supports PCI and CardBus interfaces.
• Supports PCI/CardBus clock control through clkrun.
• Supports CardBus cstschg pin and Status Changed registers.
• Supports automatic loading of subvendor ID and CardBus card information structure (CIS)
pointer from serial ROM to configuration registers.
• Supports storage of CardBus card information structure (CIS) in the serial ROM or the
expansion ROM.
• Supports the advanced PCI/CardBus read multiple, read line, and write and invalidate
commands.
• Supports an unlimited PCI/CardBus burst.
Host Interface Features:
• Includes a powerful onchip direct memory access (DMA) with programmable burst size,
providing low CPU utilization.
• Supports early interrupt on transmit and receive.
• Supports interrupt mitigation on transmit and receive.
• Supports big or little endian byte ordering for buffers and descriptors.
• Implements unique, patented intelligent arbitration between DMA channels to minimize
underflow and overflow.
• Contains large independent receive and transmit FIFOs.
Network Side Features:
• Supports three network ports: 10BASE-T (10 Mb/s), AUI (10 Mb/s), and
MII/SYM (10/100 Mb/s).
• Contains a variety of flexible address filtering modes.
• Implements signal-detect filtering to avoid false detection of link with 100BASE-TX symbol
interfaces.
• Enables automatic detection and correction of 10BASE-T receive polarity.
• Supports autodetection between 10BASE-T, AUI, and MII/SYM ports.
• Offers a unique, patented solution to Ethernet capture-effect problem.
Preliminary Datasheet
1
5 Page 
21143
2.1 Signal Reference Tables
Table 2 provides an alphabetical list of the 21143 logic names and their pin numbers. Table 3
provides a list of the 21143 power pin numbers.
Preliminary Datasheet
7
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 21143.PDF ] | |
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