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PDF PM75CSE120 Data sheet ( Hoja de datos )
| Número de pieza | PM75CSE120 | |
| Descripción | FLAT-BASE TYPE INSULATED PACKAGE | |
| Fabricantes | Mitsubishi Electric | |
| Logotipo |  |
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PM75CSE120
MITMSUITBSIUSBHIS<HINI T<EINLTLEIGLLEINGTENPOT WPOERWEMRODMUOLDEUSL>ES>
PM75CPMS7E5C1S2E0120
FLAFTL-BATA-SBEASTEYPTEYPE
INSIUNLSAUTLEADTEPDACPKAACGKEAGE
FEATURE
a) Adopting new 4th generation planar IGBT chip, which per-
formance is improved by 1µm fine rule process.
b) Using new Diode which is designed to get soft reverse
recovery characteristics.
• 3φ 75A, 1200V Current-sense IGBT for 15kHz switching
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for over-
current, short-circuit, over-temperature & under-voltage
• Acoustic noise-less 11/15kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
Dimensions in mm
110±1
95±0.5
2-2.54 2-2.54 2-2.54 6-2.54
17.02 10.16 10.16 10.16
3.22
123
4 56
78 9
10 12 14 16
11 13 15
12
4-φ5.5
MOUNTING HOLES
Screwing depth
Min9.0
Terminal code
1. VUPC
2. UP
3. VUP1
4. VVPC
5. VP
6. VVP1
7. VWPC
8. WP
9. VWP1
10. VNC
11. VN1
12. NC
13. UN
14. VN
15. WN
16. FO
W
0.5±0.3
24.5
A
VU
26
67.4
16- 0.64
26
4-R6
6-M5NUTS
2-φ2.54
21.2
22
+1.0
–0.5
φ2.54
3.22 2-2.54 0.64
LABEL
A : DETAIL
Sep. 2001
1 page  
MITSUBISHI <INTELLIGENT POWER MODULES>
PM75CSE120
FLAT-BASE TYPE
INSULATED PACKAGE
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (VD), the input terminals should be pulled up by resistores, etc. to their corre-
sponding supply voltage and each input signal should be kept off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing “OC” and “SC” tests, the turn-off surge voltage spike at the corresponding protection operation should not
be allowed to rise above VCES rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
P, (U,V,W)
P, (U,V,W)
VCIN
(0V)
IN
(Fo)
V Ic
VCIN
(15V)
IN
(Fo)
V –Ic
VD (all) U,V,W, (N)
Fig. 1 VCE(sat) Test
VD (all) U,V,W, (N)
Fig. 2 VEC Test
a) Lower Arm Switching
P
VCIN
(15V)
VCIN
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Fo
U,V,W
CS
Vcc
trr
Irr
90%
b) Upper Arm Switching VD (all)
VCIN
VCIN
(15V)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Fo
N
Ic
P
U,V,W
CS
N
10%
VCIN
Vcc td (on)
10%
tc (on)
tr
(ton= td (on) + tr)
VD (all)
Ic
Fig. 3 Switching time Test circuit and waveform
VCE
Ic
90%
10%
tc (off)
10%
td (off)
tf
(toff= td (off) + tf)
VCIN
(15V)
P, (U,V,W)
A
IN
(Fo) Pulse VCE
VCIN
Over Current
VD (all)
U,V,W, (N)
Fig. 4 ICES Test
P, (U,V,W)
VCIN
IN
(Fo)
VCC
U,V,W, (N)
VD (all)
IC
Fig. 5 OC and SC Test
OC
IC
toff (OC)
Constant Current
Short Circuit Current
Constant Current
SC
IC
Fig. 6 OC and SC Test waveform
P
VD
VCINP
U,V,W
Vcc
VD
VCINN
N
Ic
VCINP
0V
VCINN
0V
tdead
tdead
tdead
Fig. 7 Dead time measurement point example
t
t
Sep. 2001
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PM75CSE120.PDF ] | |
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