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Número de pieza | R2S15901SP | |
Descripción | Digital Delay IC | |
Fabricantes | Renesas Technology | |
Logotipo | ||
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R2S15901SP
Digital Delay IC for “Lip Sync”
Description
R2S15901SP is a digital audio delay chip to synchronize the TV video and audio signals.
Features
• CMOS Technology
• 2-Channel 24-bit Audio signals delay
• Delay time is controlled by DC voltage (9steps: 1, 7/8, 3/4, 5/8, 1/2, 3/8, 1/4, 1/8 times)
• 43K bytes RAM up to delay 224ms(@fs = 32kHz)
When fs = 48kHz, maximum delay is 149ms.
• 2 3-state pins for 9-step configuration
• 3.3V signal input available
Recommended Operating Condition
Supply Voltage Range
Circuit Current
Operation Temperature
VDD = 2.5V (typ.)
IDD = 1.0mA (typ.)
Topr= –20 to 75ºC
Applications
LCD TV, PDP, DVD Recorder, AV Amplifier
REJ03F0151-0100
Rev.1.0
Apr 28, 2005
Rev.1.0 Apr 28, 2005 page 1 of 7
1 page R2S15901SP
Mode Change
The R2S15901SP samples COUNT0 and COUNT1 pins while LRI is low by BCKI. When COUNT0 and COUNT1 are
sampled and changed, they are detected at low interval of LRI. The delay counts start from the following falling edge of
LRI with SDO to be delayed by sample counts + 1.
The SDO output is muted before the first new delay data being issued, when the new mode is recognized. An internal
POR(Power On Reset) circuitry is to setup the initial mode right after power applied.
Digital Audio Delay
COUNT0, 1
LRI
Mode switch detect
BCKI
SDO
23 22 21 20
23 22 21 20
Sample counts + 1
23 22 21 20
SDI
23 22 21 20
Mode change timing
Absolute Maximum Ratings
Parameter
Power supply voltage
Input pin voltage
Power dissipation
Operating temperature
Storage temperature
(Unless otherwise stated, VDD = 2.5V, VSS = 0V, Ta = 25°C)
Symbol
Ratings
Unit
VDD
–0.3 to +2.75
V
VI
–0.3 to 3.6
V
PD 100 mW
Topr
–20 to +75
°C
Tstg
–40 to +125
°C
Rev.1.0 Apr 28, 2005 page 5 of 7
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet R2S15901SP.PDF ] |
Número de pieza | Descripción | Fabricantes |
R2S15901SP | Digital Delay IC | Renesas Technology |
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