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TMP105 데이터시트 PDF




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부품번호 TMP105 기능
기능 Digital Temperature Sensor
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TMP105 데이터시트, 핀배열, 회로
www.DataSheet4U.com
TMP105
Chip-Scale
Package
SLLS648B − FEBRUARY 2005 − REVISED JANUARY 2006
Digital Temperature Sensor
with Two-Wire Interface
FEATURES
D SUPPORTS 1.8V I2C BUS
D TWO ADDRESSES
D DIGITAL OUTPUT: Two-Wire Serial Interface
D RESOLUTION: 9- to 12-Bits, User-Selectable
D ACCURACY:
±2.0°C (max) from −25°C to +85°C
±3.0°C (max) from −40°C to +125°C
D LOW QUIESCENT CURRENT:
50µA, 1.5µA Standby
D NO POWER-UP SEQUENCE REQUIRED, I2C
PULLUPS CAN BE ENABLED PRIOR TO V+
APPLICATIONS
D CELL PHONES
D COMPUTER PERIPHERAL THERMAL
PROTECTION
D NOTEBOOK COMPUTERS
D BATTERY MANAGEMENT
D THERMOSTAT CONTROLS
D ENVIRONMENTAL MONITORING AND HVAC
YZC LEAD FREE
2 X 3 ARRAY
(TOP VIEW)
SDA
1,65 mm
1,50 mm SCL
V+
A1 A2 GND
B1 B2 ALERT
C1 C2 A0
1,15 mm
1,00 mm
(Bump Side Down)
Note: Pin A1 is marked with a ’0” for Pb−free (YZC)
DESCRIPTION
The TMP105 is a two-wire, serial output temperature
sensor available in a WCSP package. Requiring no
external components, the TMP105 is capable of reading
temperatures with a resolution of 0.0625°C.
The TMP105 features a Two-Wire interface that is
SMBus-compatible, with the TMP105 allowing up to two
devices on one bus. The TMP105 features an SMBus Alert
function.
The TMP105 is ideal for extended temperature
measurement in a variety of communication, computer,
consumer, environmental, industrial, and instrumentation
applications.
The TMP105 is specified for operation over a temperature
range of −40°C to +125°C.
Temperature
SDA A1
Diode
Temp.
Sensor
Control
Logic
A2 GND
SCL B1
∆Σ
A/D
Converter
Serial
Interface
B2 ALERT
V+ C1
OSC
Config.
and Temp.
Register
C2
A0
TMP105
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2005−2006, Texas Instruments Incorporated
www.ti.com




TMP105 pdf, 반도체, 판매, 대치품
TMP105
SLLS648B − FEBRUARY 2005 − REVISED JANUARY 2006
TYPICAL CHARACTERISTICS
At TA = +25°C and V+ = 2.8V, unless otherwise noted.
www.ti.com
QUIESCENT CURRENT vs TEMPERATURE
100
V+ = 2.6V
80
60
40
20
0
50
25
0 25 50 75
Temperature (_ C)
100 125
SHUTDOWN CURRENT vs TEMPERATURE
3.0
2.5
2.0
V+ = 3.3V
1.5
1.0
0.5
0
50
25
V+ = 2.6V
0 25 50 75
Temperature (_C)
100 125
CONVERSION TIME vs TEMPERATURE
225
220
V+ = 2.6V
215
210
205
200
50
25
V+ = 3.3V
12−Bit Resolution
0 25 50 75
Temperature (_C)
100 125
TEMPERATURE ACCURACY vs TEMPERATURE
2.0
1.5
1.0
0.5
0.0
0.5
1.0
1.5
3 typical units 12−bit resolution.
2.0
55 35 15 5 25 45
65
85 105 125 130
Temperature (_ C)
500
450
400
350
300
250
200
150
100
50
0
1k
QUIESCENT CURRENT WITH
BUS ACTIVITY vs TEMPERATURE
+125_ C
+25_C
55_C
10k 100k
1M
Frequency (Hz)
10M
4

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TMP105 전자부품, 판매, 대치품
TMP105
www.ti.com
CONVERTER RESOLUTION (R1/R0)
The Converter Resolution bits control the resolution of the
internal analog-to-digital (A/D) converter. This control
allows the user to maximize efficiency by programming for
higher resolution or faster conversion time. Table 8
identifies the resolution bits and the relationship between
resolution and conversion time.
R1 R0
RESOLUTION
CONVERSION TIME
(typical)
00
9 Bits (0.5°C)
27.5ms
01
10 Bits (0.25°C)
55ms
10
11 Bits (0.125°C)
110ms
1 1 12 Bits (0.0625°C)
220ms
Table 8. Resolution of the TMP105
ONE-SHOT (OS)
The TMP105 features a One-Shot Temperature
Measurement Mode. When the device is in Shutdown
Mode, writing a ‘1’ to the OS bit starts a single temperature
conversion. The device will return to the shutdown state at
the completion of the single conversion. This option is
useful to reduce power consumption in the TMP105 when
continuous temperature monitoring is not required. When
the Configuration Register is read, the OS always reads
zero.
HIGH AND LOW LIMIT REGISTERS
In Comparator Mode (TM = 0), the ALERT pin of the
TMP105 becomes active when the temperature equals or
exceeds the value in THIGH and generates a consecutive
number of faults according to fault bits F1 and F0. The
ALERT pin remains active until the temperature falls below
the indicated TLOW value for the same number of faults.
In Interrupt Mode (TM = 1), the ALERT pin becomes active
when the temperature equals or exceeds THIGH for a
consecutive number of fault conditions. The ALERT pin
remains active until a read operation of any register
occurs, or until the device successfully responds to the
SMBus Alert Response address. The ALERT pin clears if
the device is placed in Shutdown Mode. Once the ALERT
pin is cleared, it will only become active again by the
temperature falling below TLOW. When the temperature
falls below TLOW, the ALERT pin becomes active and
remains active until cleared by a read operation of any
SLLS648B − FEBRUARY 2005 − REVISED JANUARY 2006
register or a successful response to the SMBus Alert
Response address. When the ALERT pin clears, the
above cycle will repeat, with the ALERT pin becoming
active when the temperature equals or exceeds THIGH.
The ALERT pin can also be cleared by resetting the device
with the General Call Reset command. This reset also
clears the state of the internal registers in the device
returning the device to Comparator Mode (TM = 0).
Both operational modes are represented in Figure 3.
Table 9 and Table 10 describe the format for the THIGH and
TLOW Registers. Note that the most significant byte is sent
first, followed by the least significant byte. Power-up reset
values for THIGH and TLOW are:
THIGH = 80°C and TLOW = 75°C
The format of the data for THIGH and TLOW is the same as
for the Temperature Register.
BYTE D7 D6 D5 D4 D3 D2 D1 D0
1 H11 H10 H9 H8 H7 H6 H5 H4
BYTE D7 D6 D5 D4 D3 D2 D1 D0
2 H3 H2 H1 H0 0 0 0 0
Table 9. Bytes 1 and 2 of THIGH Register
BYTE D7 D6 D5 D4 D3 D2 D1 D0
1 L11 L10 L9 L8 L7 L6 L5 L4
BYTE D7 D6 D5 D4 D3 D2 D1 D0
2 L3 L2 L1 L0 0 0 0 0
Table 10. Bytes 1 and 2 of TLOW Register
All 12 bits for the Temperature, THIGH, and TLOW Registers
are used in the comparisons for the ALERT function for all
converter resolutions. The three LSBs in THIGH and TLOW
can affect the ALERT output even if the converter is
configured for 9-bit resolution.
SERIAL INTERFACE
The TMP105 operates only as a slave device on the
Two-Wire bus and SMBus. Connections to the bus are
made via the open-drain I/O lines SDA and SCL. The SDA
and SCL pins feature integrated spike suppression filters
and Schmitt triggers to minimize the effects of input spikes
and bus noise. The TMP105 supports the transmission
protocol for fast (1kHz to 400kHz) mode. All data bytes are
transmitted MSB first.
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