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기능 QUAD 5V RINGING SLIC
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AG1460 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Silver
TELECOM
V1.4 May 2004
Data Sheet
Ag1460
QUAD 5V RINGING SLIC
TIP1
RING1
RINGING
SLIC1
VIN1
VOUT1
FEATURES
• Four highly featured SLICs in a 72 pin
SIMM or 56 pin DIL format.
TIP2
RING2
TIP3
RING3
RINGING
SLIC2
RINGING
SLIC3
VIN2
VOUT2
VIN3
VOUT3
• Integral DC-DC converter. No battery
voltage supply needed.
• Highly integrated with on board ringing
generator.
• Tip/Ring polarity reversal, On-Hook
Transmission for caller line ID.
TIP4
RING4
RINGING
SLIC4
VIN4
VOUT4
• “Soft Shutdown” over current and
thermal protection provides fail-safe
operation.
Control and
Supervision
• Minimum number of external
components.
• Simplified protection in “on-premise”
applications.
DESCRIPTION
The Silver Telecom Ag1460 series comprises
four individual single Subscriber Line
Interface Circuits (SLICs) in a 72-pin SIMM or
56 pin DIL format. The combination of
features and packaging offers extremely
efficient use of board area, saving significant
system size and cost, maximising time to
market for Telephony Systems developers.
• Silver Telecom “design-in” assistance.
The Ag1460 has integral dc/dc converter and
ringing generation thus providing all the line
powering requirements from a single supply.
The SLIC requires a minimum of external
components.
The system interface has been designed for
connection to all popular codecs of both the
audio and signalling connections.
The Ag1460 has been designed to work with
loop lengths of up to 3.0km (800including
telephone), with both resistive and complex
line impedances. Its performance to
regulatory standards allows use in public and
private network applications.
The Ag1460 is ideal for low line count, short
loop length applications, such as ISDN
Terminal Adaptors, Internet Telephony (VoIP),
Computer Telephony Integration (CTI), Digital
Loop Carriers (DLC), Wireless Local Loops
(WLL) and Small Office Home Office (SOHO).
© Silver Telecom 2004




AG1460 pdf, 반도체, 판매, 대치품
V1.4 May 2004
Data Sheet
Ag1460
QUAD 5V RINGING SLIC
1.0 Pin Description
1.1 SIMM Format Pin Out
Pin #
Name
Description
1, 19, 38, 56
F/R
Forward/Reverse. A logic 0 will reverse the Tip and Ring voltage
polarities. F/R is toggled to produce the ringing output.
2, 20, 39, 57 TIP (A) Tip. Connects to the subscriber line Tip.
3, 21, 40, 58 RING (B) Ring. Connects to the subscriber line Ring.
4, 22, 41, 59
5, 18, 55, 60
6, 7, 8, 37,
61, 62, 63
9, 27, 46, 64
10, 28, 47, 65
11, 29, 48, 66
12, 30, 49, 67
13, 31, 50, 68
14, 32, 51, 69
15, 33, 52, 70
16, 34, 53, 71
17, 35, 54, 72
23, 24, 25, 26
36
LO
+5VA
NC
VIN
GNDA
VOUT
SHK
CAP
RM
ZT1*
ZT2*
ZB*
+5VPWR
PD
Loop Off. A logic 1 removes the loop current from the line.
Connect to logic 0 for normal operation.
Analog Supply. Each pin must be connected to +5VPWR with
10resistors. Decouple each with 100uF (16V) capacitors.
No Connection. These pins are not connected internally to the
device.
Audio In. This is the analog input signal from the Codec (which is
output on Tip and Ring). Must be ac coupled with typically
100nF.
Analog Ground. Normally connected to system ground. All 4
pins must be connected to analog ground by separate tracks or
ground plane.
Audio Out. This is the analog output signal (from Tip and Ring)
to the Codec. Must be ac coupled with typically 100nF.
Switch Hook. Indicates Off-Hook when at logic 1. Must be
de-bounced
Slew Rate Capacitor. A capacitor is fitted between this pin and
GND to control the battery reversal and the ringing slew rate.
220nF is recommended.
Ringing Mode. Sets bias conditions during ringing. Must be set
to logic 1 during ringing. Must be set to logic 0 within 500ms of
Ring Trip detect and during normal Off Hook condition.
Terminal Impedance 1. Connect programming components
between ZT1 and ZT2 on Ag1460P only.*
Terminal Impedance 2. Connect programming components
between ZT1 and ZT2 on Ag1460P only.*
Balance Impedance. Connect programming components
between ZB and VIN on Ag1460P only.*
DC-DC Supply. +5V input for the integral DC-DC converter.
Decouple to GNDPWR with 220uF (10V) low impedance
capacitor.
Power Down. A logic 1 powers off the DC-DC converter.
Connect to logic 0 for normal operation.
42, 43, 44, 45 GNDPWR DC-DC Ground. Internal ground for the DC-DC converter.
*On Ag1460 these pins are used for internal connection, and must be left unconnected.
© Silver Telecom 2004

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AG1460 전자부품, 판매, 대치품
V1.4 May 2004
Data Sheet
switches to produce a battery voltage of -72V. This will
produce greater than 40VRMS into a REN of 3. The
slope of the edges on the ringing waveform is
determined by the value of the slew rate capacitor
connected between the CAP pin and Ground. A 220nF
capacitor is recommended with 20Hz ringing.
When the “off-hook” condition occurs during ringing,
the ring-trip circuit on the Ag1460 senses the loop
current flowing and signals the off-hook condition on
the SHK output (as shown in figure 3). The SHK signal
must be “debounced” to remove any spurious pulses
by the controlling processor. On detection of SHK the
ringing signal must be removed from the F/R pin and
RM taken to a logic 0 within 500ms to avoid excessive
power dissipation in the line driver circuit. The ring-trip
function will operate up to a maximum loop resistance
of 800(including telephone), which corresponds to
around 3km loop length.
To keep within the power rating of the on-board DC-DC
converter, it is important that only one SLIC channel is
ringing at any time. This can be met by using a ringing
cadence of 1 second ON, 3 seconds OFF. The active
ringing channel is then sequenced so that all four SLIC
channels may be in the ringing mode, but only one is
supplying ringing current at any one time.
Ag1460
QUAD 5V RINGING SLIC
The DC-DC converter can be switched off by applying
a logic 1 to the PD input. This reduces the current
consumption to a nominal 10mA. The SLIC takes
50ms to power up from this powered down state.
When using the power down state it is recommended
that the SLIC is polled (powered up periodically) to
check for SHK (the subscriber has gone off hook).
Since the DC-DC converter supplies the power to all
four SLICs on the Ag1460, all four SLICs will be
powered down when the PD signal is applied.
2.0 The 2-4 Wire (hybrid) Conversion.
Each individual SLIC of the Ag1460 transmits and
receives balanced 2-wire analog signals at the Tip and
Ring connections. These are converted to a ground
referenced output at VOUT and from a ground referenced
input at VIN.
VOUT and VIN are normally connected to a Codec for
conversion to and from a digital Pulse Code Modulated
(PCM) stream.
2.1 The 2 Wire Impedance.
1.3 Loop Off and Power Down
The loop current can be removed from the line by
switching the LO input to a logic 1. This can be used
as a power denial to the line or to present a very high
impedance to the line. Typically used when carrying
out maintenance on the line, or to suspend service
during a line fault, etc.
For the Ag1460, the input impedance, Zin, of each
SLIC is set to 600. For countries where the line
impedance is 600e.g. North America, no external
adjustment is required. For countries where an
alternative line impedance is used the Codec filter
characteristics can be programmed to give the required
matching.
Country
USA
Termination
Impedance
600R
Balance
Impedance
600R
ZT
150K
ZB
150K
150K
100pF
Germany
Spain
South Africa
Europe
CTR21
UK
220R 820R
120nF
270R 750R
150nF
300R 1000R
220nF
220R 820R
120nF
270R 750R
150nF
370R 620R
310nF
56K 200K
470pF
68K 180K
620pF
75K 240K
910pF
150K
150K
100pF
150K
150K
TBD
100pF
TBD
TBD
TBD
Table 1: Impedance Programming for Ag1460P
© Silver Telecom 2004

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AG1460

QUAD 5V RINGING SLIC

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