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PDF 7493 Data sheet ( Hoja de datos )
| Número de pieza | 7493 | |
| Descripción | Decade and Binary Counters | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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 1. Binary Ripple Counter - NXP  Hay una vista previa y un enlace de descarga de 7493 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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July 1992
DM5490 DM7490A DM7493A
Decade and Binary Counters
General Description
Each of these monolithic counters contains four master-
slave flip-flops and additional gating to provide a divide-by-
two counter and a three-stage binary counter for which the
count cycle length is divide-by-five for the 90A and divide-
by-eight for the 93A
All of these counters have a gated zero reset and the 90A
also has gated set-to-nine inputs for use in BCD nine’s com-
plement applications
To use their maximum count length (decade or four-bit bina-
ry) the B input is connected to the QA output The input
count pulses are applied to input A and the outputs are as
described in the appropriate truth table A symmetrical di-
vide-by-ten count can be obtained from the 90A counters by
connecting the QD output to the A input and applying the
input count to the B input which gives a divide-by-ten square
wave at output QA
Features
Y Typical power dissipation
90A 145 mW
93A 130 mW
Y Count frequency 42 MHz
Connection Diagrams
Dual-In-Line Package
TL F 6533 – 1
Order Number DM5490J DM5490W or DM7490AN
See NS Package Number J14A N14A or W14B
Dual-In-Line Package
Order Number DM7493AN
See NS Package Number N14A
TL F 6533 – 2
C1995 National Semiconductor Corporation TL F 6533
RRD-B30M105 Printed in U S A
1 page  
’93A Switching Characteristics
at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
From (Input)
To (Output)
fMAX
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPHL
Maximum Clock
Frequency
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
Low to High Level Output
Propagation Delay Time
High to Low Level Output
Propagation Delay Time
High to Low Level Output
A to QA
B to QB
A to
QA
A to
QA
A to
QD
A to
QD
B to
QB
B to
QB
B to
QC
B to
QC
B to
QD
B to
QD
SET-0
to
Any Q
RL e 400X
CL e 15 pF
Min Max
32
16
16
18
70
70
16
21
32
35
51
51
40
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 7493.PDF ] | |
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