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부품번호 | ATMEGA6490 기능 |
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기능 | 8-bit Microcontroller | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 30 페이지수
Features
• High Performance, Low Power Atmel®AVR® 8-Bit Microcontroller
• Advanced RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
• High Endurance Non-volatile Memory Segments
– In-System Self-programmable Flash Program Memory
• 32KBytes (ATmega329/ATmega3290)
• 64KBytes (ATmega649/ATmega6490)
– EEPROM
• 1Kbytes (ATmega329/ATmega3290)
• 2Kbytes (ATmega649/ATmega6490)
– Internal SRAM
• 2Kbytes (ATmega329/ATmega3290)
• 4Kbytes (ATmega649/ATmega6490)
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C(1)
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
• JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
• Peripheral Features
– 4 x 25 Segment LCD Driver (ATmega329/ATmega649)
– 4 x 40 Segment LCD Driver (ATmega3290/ATmega6490)
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
• Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
Standby
• I/O and Packages
– 53/68 Programmable I/O Lines
– 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP
• Speed Grade:
– ATmega329V/ATmega3290V/ATmega649V/ATmega6490V:
– 0 - 4MHz @ 1.8 - 5.5V, 0 - 8MHz @ 2.7 - 5.5V
– ATmega329/3290/649/6490:
– 0 - 8MHz @ 2.7 - 5.5V, 0 - 16MHz @ 4.5 - 5.5V
• Temperature range:
– -40°C to 85°C Industrial
• Ultra-Low Power Consumption
– Active Mode:
• 1MHz, 1.8V: 350µA
• 32kHz, 1.8V: 20µA (including Oscillator)
• 32kHz, 1.8V: 40µA (including Oscillator and LCD)
– Power-down Mode:
• 100nA at 1.8V
8-bit Atmel
Microcontroller
with In-System
Programmable
Flash
ATmega329/V
ATmega3290/V
ATmega649/V
ATmega6490/V
2552K–AVR–04/11
2. Overview
The ATmega329/3290/649/6490 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architec-
ture. By executing powerful instructions in a single clock cycle, the ATmega329/3290/649/6490 achieves throughputs
approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2.1 Block Diagram
Figure 2-1. Block Diagram
GND
VCC
AVCC
AGND
AREF
PF0 - PF7
PA0 - PA7
PC0 - PC7
PORTF DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
8-BIT DATA BUS
DATA DIR.
REG. PORTC
ADC
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
ON-CHIP DEBUG
BOUNDARY-
SCAN
PROGRAMMING
LOGIC
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
SRAM
GENERAL
PURPOSE
REGISTERS
X
Y
Z
ALU
AVR CPU
STATUS
REGISTER
USART
UNIVERSAL
SERIAL INTERFACE
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
CALIB. OSC
OSCILLATOR
TIMING AND
CONTROL
LCD
CONTROLLER/
DRIVER
SPI
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG. DATA DIR.
PORTG REG. PORTG
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
4 ATmega329/3290/649/6490
2552K–AVR–04/11
4페이지 ATmega329/3290/649/6490
2.3.5
2.3.6
2.3.7
2.3.8
Port C (PC7..PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of special features of the ATmega329/3290/649/6490 as listed
on page 71.
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATmega329/3290/649/6490
as listed on page 73.
Port E (PE7..PE0)
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port E output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port E also serves the functions of various special features of the ATmega329/3290/649/6490
as listed on page 75.
Port F (PF7..PF0)
Port F serves as the analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins
can provide internal pull-up resistors (selected for each bit). The Port F output buffers have sym-
metrical drive characteristics with both high sink and source capability. As inputs, Port F pins
that are externally pulled low will source current if the pull-up resistors are activated. The Port F
pins are tri-stated when a reset condition becomes active, even if the clock is not running. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will
be activated even if a reset occurs.
Port F also serves the functions of the JTAG interface.
2552K–AVR–04/11
7
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부품번호 | 상세설명 및 기능 | 제조사 |
ATMEGA649 | 8-bit Microcontroller | ATMEL Corporation |
ATMEGA6490 | 8-bit Microcontroller | ATMEL Corporation |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |