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PDF AS4CM4EOQ Data sheet ( Hoja de datos )
| Número de pieza | AS4CM4EOQ | |
| Descripción | 4M X 4 CMOS Quad CAS DRAM (EDO) family | |
| Fabricantes | ALSC | |
| Logotipo |  |
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March 2001
®
4M ✕ 4 CMOS QuadCAS DRAM (EDO) family
AS4C4M4EOQ
AS4C4M4E1Q
Features
• Organization: 4,194,304 words × 4 bits
• High speed
- 50/60 ns RAS access time
- 25/30 ns column address access time
- 12/15 ns CAS access time
• Low power consumption
- Active: 495 mW max
- Standby: 5.5 mW max, CMOS I/O
• Extended data out
• Refresh
- 4096 refresh cycles, 64 ms refresh interval for
4C4M4EOQ
- 2048 refresh cycles, 32 ms refresh interval for
AS4C4M4E1Q
- RAS-only and hidden refresh or CAS-before-RAS refresh
or self-refresh
• TTL-compatible
• 4 separate CAS pins allow for separate I/O operation
• JEDEC standard package
- 300 mil, 28-pin SOJ
- 300 mil, 28-pin TSOP
• 5V power supply
• Latch-up current ≥ 200 mA
• ESD protection ≥ 2000 mV
Pin arrangement
SOJ
TSOP
VCC
I/O0
I/O1
WE
RAS
*NC/A11
CAS0
CAS1
A10
A0
A1
A2
A3
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 GND
27 I/O3
VCC 1
I/O0 2
26 I/O2
I/O1 3
25 CAS3
WE 4
24 OE
RAS 5
23 A9
*NC/A11 6
22 CAS2
21 NC
CAS0 7
CAS1 8
20 A8
19 A7
18 A6
A10 9
A0 10
A1 11
17 A5
A2 12
16 A4
A3 13
15 GND
VCC 14
* NC on 2K refresh version; A11 on 4K refresh version
28 GND
27 I/O3
26 I/O2
25 CAS3
24 OE
23 A9
22 CAS2
21 NC
20 A8
19 A7
18 A6
17 A5
16 A4
15 GND
Pin designation
Pin(s)
Description
A0 to A11
Address inputs
RAS Row address strobe
CAS Column address strobe
WE Write enable
I/O0 to I/O3
Input/output
OE Output enable
VCC
GND
Power
Ground
NC No Connection
Selection guide
Maximum RAS access time
Maximum column address access time
Maximum CAS access time
Maximum output enable (OE) access time
Minimum read or write cycle time
Minimum hyper page mode cycle time
Maximum operating current
Maximum CMOS standby current
Symbol
tRAC
tCAA
tCAC
tOEA
tRC
tPC
ICC1
ICC5
4C4M4EOQ/E1Q-50
50
25
12
13
85
20
110
1.0
3/22/01; v.1.0
Alliance Semiconductor
4C4M4EOQ/E1-60
60
30
15
15
100
24
100
1.0
Unit
ns
ns
ns
ns
ns
ns
mA
mA
P. 1 of 16
Copyright © Alliance Semiconductor. All rights reserved.
1 page  
AS4C4M4EOQ
AS4C4M4E1Q
®
DC electrical characteristics (AS4LC4M4E0/E1)
Parameter
Symbol Test conditions
Input leakage current IIL
0V ≤ Vin ≤ VCC (max)
Pins not under test = 0V
Output leakage current IOL
DOUT disabled, 0V ≤ Vout ≤ VCC
(max)
Operating power
supply current
TTL standby power
supply current
Average power supply
current, RAS refresh
mode or CBR
ICC1
ICC2
ICC3
RAS, UCAS, LCAS, Address cycling;
tRC=min
RAS = UCAS = LCAS ≥ VIH,
all other inputs at VIH or VIL
RAS cycling, UCAS = LCAS ≥ VIH,
tRC = min of RAS low after XCAS low.
EDO page mode
average power supply
current
ICC4
RAS = VIL, UCAS or LCAS,
address cycling: tHPC = min
CMOS standby power
supply current
ICC5
RAS = UCAS = LCAS = VCC - 0.2V,
F=0
Output voltage
VOH
VOL
CAS before RAS refresh
current
ICC6
IOUT = -2.0 mA
IOUT = 2 mA
RAS, UCAS or LCAS cycling, tRC =
min
RAS = UCAS = LCAS ≤ 0.2V,
Self refresh current
ICC7
WE = OE = VCC - 0.2V,
all other inputs at 0.2V or VCC -
0.2V
-50
Min Max
-5 +5
-5 +5
– 85
– 2.0
– 80
– 85
– 200
2.4 –
– 0.4
– 80
– 0.3
-60
Min Max Unit Notes
-5 +5 µA
-5 +5 µA
– 75 mA 4,5
– 2.0 mA
– 70 mA 4
– 75 mA 4, 5
– 200 µA
2.4 –
– 0.4
V
V
– 70 mA
– 0.3 mA
3/22/01; v.1.0
Alliance Semiconductor
P. 5 of 16
5 Page 
Write waveform
RAS
tCRP
CAS
Address
tASR
Row address
WE
OE
DQ
®
tRAS
tRC
tRCD
tRAD
tRAH
tCSH
tRSH
tCAS
tRAL
tASC
tCAH
Column address
tRWL
tCWL
tWP
tOED
tOEH
tDS
tDH
Data in
AS4C4M4EOQ
AS4C4M4E1Q
OE controlled
tRP
Read-modify-write waveform
RAS
tCRP
tRCD
tRWC
tRAS
tCSH
tCAS
tRSH
CAS
Address
WE
OE
DQ
tRAD
tAR
tASC
tRAL
tASR tRAH
tCAH
Row address
Column address
tRWD
tAWD
tRCS tCWD
tOEA
tOEZ
tRAC
tAA
tCAC
tCLZ
Data out
tOLZ
tOED
tRP
tRWL
tCWL
tWP
tDS
tDH
Data in
3/22/01; v.1.0
Alliance Semiconductor
P. 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AS4CM4EOQ.PDF ] | |
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