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PDF HCPL-7560 Data sheet ( Hoja de datos )
| Número de pieza | HCPL-7560 | |
| Descripción | Optically Isolated Sigma-Delta Modulator | |
| Fabricantes | Agilent | |
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Agilent HCPL-7560
Optically Isolated Sigma-Delta (Σ-∆)
Modulator
Data Sheet
Description
The HCPL-7560 Optically
Isolated Modulator and HCPL-
0872 Digital Interface IC or
digital filter together form an
isolated programmable two-
chip analog-to-digital
converter. The isolated
modulator allows direct
measurement of motor phase
currents in power inverters.
In operation, the HCPL-7560
Isolated Modulator
(optocoupler with 3750 VRMS
dielectric withstand voltage
rating) converts a low-
bandwidth analog input into a
high-speed one-bit data stream
by means of a Sigma-Delta (Σ-
∆) over-sampling modulator.
This modulation provides for
high noise margins and
excellent immunity against
isolation-mode transients. The
modulator data and on-chip
sampling clock are encoded
and transmitted across the
isolation boundary where they
are recovered and decoded
into separate high-speed clock
and data channels.
Input
Curr ent
18
2
SIGMA-
DELTA
MOD./
3 ENCODE
DECODE
7
6
45
HCPL-7560
HCPL-0872
or
Digital Filter
MCU
or
DSP
A 0.1 µF bypass capacitor must be connected between pins VDD and Ground
Features
• 8-bit Linearity
• 200 ns Conversion Time (Pre-
Trigger Mode 2 with HCPL-0872)
• 8-bit Effective Resolution with 5 ìs
Signal Delay (14-bit with 102 µs)
(with HCPL-0872)
• Fast 3 µs Over-Range Detection
(with HCPL-0872)
• ± 200 mV Input Range with Single
5 V Supply
• 5% Internal Reference Voltage
Matching
• Offset Calibration (with HCPL-
0872)
• -40°C to +85°C Operating
Temperature Range
• 15 kV/µs Isolation Transient
Immunity
• Safety Approval: UL 1577, CSA
and IEC/EN/DIN EN 60747-5-2
Applications
• Motor Phase and Rail Current
Sensing
• Data Acquisition Systems
• Industrial Process Control
• Inverter Current Sensing
• General Purpose Current Sensing
and Monitoring
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation, which may be induced by ESD.
SPI and QSPI are trademarks of Motorola Corp.
Microwire is a trademark of National Semiconductor Inc.
1 page  
Regulatory Information
The HCPL-7560 has been approved by the following organizations:
IEC/EN/DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
UL
Approval under UL 1577, component recognition program up to VISO = 3750 VRMS. File E55361.
CSA
Approval under CSA Component Acceptance Notice #5, File CA 88324.
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics[1]
Description
Symbol
HCPL-7560 Unit
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 450 Vrms
for rated mains voltage ≤ 600 Vrms
I - IV
I - III
I - II
Climatic Classification
40/85/21
Pollution Degree (DIN VDE 0110/1.89)
2
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b[2]
VIORM x 1.875=VPR, 100% Production Test withtm=1 sec,
Partial discharge < 5 pC
VIORM
VPR
891
1670
Vpeak
Vpeak
Input to Output Test Voltage, Method a*
VIORM x 1.5=VPR, Type and Sample Test, tm=60 sec,
Partial discharge < 5 pC
VPR
1336
Vpeak
Highest Allowable Overvoltage
(Transient Overvoltage tini = 10 sec)
VIOTM
6000
Vpeak
Safety-limiting values - maximum values allowed in the event of a failure,
also see Figure 13.
Case Temperature
Input Current[3]
Output Power[3]
TS
IS, INPUT
PS, OUTPUT
175
400
600
°C
mA
mW
Insulation Resistance at TS, VIO = 500 V
RS >109 Ω
Notes:
1. Insulation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits within the
application. Surface Mount Classifications is Class A in accordance with CECC00802.
2. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/
DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.
3. Refer to the following figure for dependence of PS and IS on ambient temperature.
5
5 Page 
14
13
12
11
10
9
8
123 4
CONVERSION MODE #
Figure 10. SNR vs. Conversion Mode.
5
80
75
70
65
60
55
50
45
123 45
CONVERSION MODE #
Figure 11. Effective Resolution vs. Conversion
Mode.
200
180
160
140
120
100
80
60
40
20
0
1
PRE-TRIGGER
MODE 0
PRE-TRIGGER
MODE 1
PRE-TRIGGER
MODE 2
234
CONVERSION MODE #
5
Figure 12. Conversion Time vs. Conversion
Mode.
100
90
80
70
60
50
40
30
20
10
0
12345
CONVERSION MODE #
Figure 13. Signal Delay vs. Conversion Mode.
VIN+ (200 mV/DIV.)
OVR1 (200 mV/DIV.)
THR1
(2 V/DIV.)
2 µs/DIV.
Figure 14. Over-Range and Threshold Detect
Times.
100
90
80
70
60
50
40
30
20
10
0
12345
CONVERSION MODE #
Figure 15. Signal Bandwidth vs. Conversion
Mode.
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet HCPL-7560.PDF ] | |
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