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부품번호 | K9F1208U0B 기능 |
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기능 | 64M x 8 Bit NAND Flash Memory | ||
제조업체 | Samsung semiconductor | ||
로고 | |||
전체 30 페이지수
KK99FF11220088BR00BB
K9F1208U0B
www.DataSheet4U.com
Document Title
64M x 8 Bit NAND Flash Memory
Preliminary
FLASH MEMORY
Revision History
Revision No. History
0.0 Initial issue.
0.1 1. Note 1 ( Program/Erase Characteristics) is added( page 14 )
2. NAND Flash Technical Notes is changed.
-Invalid block -> initial invalid block ( page 16 )
-Error in write or read operation ( page 17 )
-Program Flow Chart ( page 17 )
3. Vcc range is changed
-2.4V~2.9V -> 2.5V~2.9V
-1.7V~1.95V ->1.65V~1.95V
4. Multi plane operation and Copy-Back Program are not supported with 1.8V
device.
Draft Date
Apr. 24th 2004
Oct. 11th.2004
Remark
Advance
Preliminary
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
1
Package Dimensions
FLASH MEMORY
PIN CONFIGURATION (WSOP1)
K9F1208U0B-VCB0,FCB0/VIB0,FIB0
N.C
N.C
DNU
N.C
N.C
N.C
R/B
RE
CE
DNU
N.C
Vcc
Vss
N.C
DNU
CLE
ALE
WE
WP
N.C
N.C
DNU
N.C
N.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 N.C
47 N.C
46 DNU
45 N.C
44 I/O7
43 I/O6
42 I/O5
41 I/O4
40 N.C
39 DNU
38 N.C
37 Vcc
36 Vss
35 N.C
34 DNU
33 N.C
32 I/O3
31 I/O2
30 I/O1
29 I/O0
28 N.C
27 DNU
26 N.C
25 N.C
PACKAGE DIMENSIONS
48-PIN LEAD PLASTIC VERY VERY THIN SMALL OUT-LINE PACKAGE TYPE (I)
48 - WSOP1 - 1217F
Unit :mm
15.40±0.10
0.70 MAX
0.58±0.04
#1 #48
#24 #25
(0.01Min)
17.00±0.20
4
0.45~0.75
4페이지 KK99FF11220088BR00BB
K9F1208U0B
Preliminary
FLASH MEMORY
PIN DESCRIPTION
Pin Name
I/O0 ~ I/O7
(K9F1208X0B)
Pin Function
DATA INPUTS/OUTPUTS
The I/O pins are used to input command, address and data, and to output data during read operations. The I/
O pins float to high-z when the chip is deselected or when the outputs are disabled.
COMMAND LATCH ENABLE
CLE The CLE input controls the activating path for commands sent to the command register. When active high,
commands are latched into the command register through the I/O ports on the rising edge of the WE signal.
ADDRESS LATCH ENABLE
ALE The ALE input controls the activating path for address to the internal address registers. Addresses are
latched on the rising edge of WE with ALE high.
CHIP ENABLE
CE
The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and
the device does not return to standby mode in program or erase operation. Regarding CE control during
read operation, refer to ’Page read’ section of Device operation .
READ ENABLE
RE The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid
tREA after the falling edge of RE which also increments the internal column address counter by one.
WRITE ENABLE
WE The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of
the WE pulse.
WRITE PROTECT
WP The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage
generator is reset when the WP pin is active low.
READY/BUSY OUTPUT
R/B
The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or
random read operation is in process and returns to high state upon completion. It is an open drain output and
does not float to high-z condition when the chip is deselected or when outputs are disabled.
VccQ
OUTPUT BUFFER POWER
VccQ is the power supply for Output Buffer.
VccQ is internally connected to Vcc, thus should be biased to Vcc.
Vcc
POWER
VCC is the power supply for device.
Vss GROUND
N.C
NO CONNECTION
Lead is not internally connected.
DNU
DO NOT USE
Leave it disconnected.
NOTE : Connect all VCC and VSS pins of each device to common power supply outputs.
Do not leave VCC or VSS disconnected.
7
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부품번호 | 상세설명 및 기능 | 제조사 |
K9F1208U0 | 64M x 8 Bit NAND Flash Memory | Samsung semiconductor |
K9F1208U0A | (K9F1208x0A / K9F1216x0A) 64M x 8 Bit / 32M x 16 Bit NAND Flash Memory | Samsung semiconductor |
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