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부품번호 CS4121 기능
기능 Low Voltage Precision Air-Core Tach/Speedo Driver
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CS4121 데이터시트, 핀배열, 회로
www.DataSheet4U.com
CS4121
Low Voltage Precision
Air−Core Tach/Speedo
Driver
The CS4121 is specifically designed for use with air−core meter
movements. The IC provides all the functions necessary for an analog
tachometer or speedometer. The CS4121 takes a speed sensor input
and generates sine and cosine related output signals to differentially
drive an air−core meter.
Many enhancements have been added over industry standard
tachometer drivers such as the CS289 or LM1819. The output utilizes
differential drivers which eliminates the need for a Zener reference
and offers more torque. The device withstands 60 V transients which
decreases the protection circuitry required. The device is also more
precise than existing devices allowing for fewer trims and for use in a
speedometer.
The CS4121 is compatible with the CS8190, and provides higher
accuracy at a lower supply voltage (8.0 V min. as opposed to 8.5 V). It
is functionally operational to 6.5 V.
Features
Pb−Free Package is Available*
Direct Sensor Input
High Torque Output
Low Pointer Flutter
High Input Impedance
Overvoltage Protection
Accurate to 8.0 V Functional to 6.5 V (typ)
Internally Fused Leads in SO−20 Package and DIP−16
ABSOLUTE MAXIMUM RATINGS
Rating
Value Unit
Supply Voltage, VCC
< 100 ms Pulse Transient
Continuous
60
24
Operating Temperature (TJ)
Storage Temperature
−40 to +105
−40 to +165
Junction Temperature
−40 to +150
ESD (Human Body Model)
4.0
Lead Temperature Soldering:
Wave Solder (through hole styles only) (Note 1)
Reflow: (SMD styles only) (Note 2)
260 peak
230 peak
V
V
°C
°C
°C
kV
°C
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
1. 10 seconds maximum.
2. 60 second maximum above 183°C.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
20
1
SO−20L
DWF SUFFIX
CASE 751D
16
1
DIP−16
NF SUFFIX
CASE 648
ORDERING INFORMATION
Device
Package
CS4121EDWF20 SO−20L
CS4121EDWF20G SO−20L
(Pb−Free)
CS4121EDWFR20 SO−20L
CS4121ENF16
DIP−16
Shipping
37 Units/Rail
37 Units/Rail
1000 Tape&Reel
25 Units/Rail
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
DEVICE MARKING INFORMATION
See specific marking information and pin connection
information on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 8
1
Publication Order Number:
CS4121/D




CS4121 pdf, 반도체, 판매, 대치품
PIN FUNCTION DESCRIPTION
PACKAGE PIN #
DIP−16
SO−20L
11
22
33
4, 5, 12, 13 4−7, 14−17
68
79
8 10
9 11
10 12
11 13
14 18
15 19
16 20
CS4121
PIN SYMBOL
CP+
SQOUT
FREQIN
GND
COS+
COS−
VCC
BIAS
SIN−
SIN+
VREG
F/VOUT
CP−
FUNCTION
Positive input to charge pump.
Buffered square wave output signal.
Speed or RPM input signal.
Ground Connections.
Positive cosine output signal.
Negative cosine output signal.
Ignition or battery supply voltage.
Test point or zero adjustment.
Negative sine output signal.
Positive sine output signal.
Voltage regulator output.
Output voltage proportional to input signal frequency.
Negative input to charge pump.
MARKING DIAGRAM AND PIN CONNECTIONS
1
CP+
SQOUT
FREQIN
GND
GND
COS+
COS−
VCC
DIP−16
16
CP−
F/VOUT
VREG
GND
GND
SIN+
SIN−
BIAS
SO−20L
1 20
CP+
CP−
SQOUT
FREQIN
GND
F/VOUT
VREG
GND
GND
GND
GND
GND
GND
GND
COS+
SIN+
COS−
SIN−
VCC BIAS
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
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CS4121 전자부품, 판매, 대치품
CS4121
CIRCUIT DESCRIPTION and APPLICATION NOTES
The CS4121 is specifically designed for use with air−core
meter movements. It includes an input comparator for
sensing an input signal from an ignition pulse or speed
sensor, a charge pump for frequency to voltage conversion,
a bandgap voltage regulator for stable operation, and a
function generator with sine and cosine amplifiers to
differentially drive the meter coils.
From the partial schematic of Figure 7, the input signal is
applied to the FREQIN lead, this is the input to a high
impedance comparator with a typical positive input
threshold of 2.0 V and typical hysteresis of 0.5 V. The output
of the comparator, SQOUT, is applied to the charge pump
input CP+ through an external capacitor CCP. When the
input signal changes state, CCP is charged or discharged
through R3 and R4. The charge accumulated on CCP is
mirrored to C4 by the Norton Amplifier circuit comprising
of Q1, Q2 and Q3. The charge pump output voltage, F/VOUT,
ranges from 2.0 V to 6.3 V depending on the input signal
frequency and the gain of the charge pump according to the
formula:
FńVOUT + 2.0 V ) 2.0 FREQ CCP RT (VREG * 0.7 V)
RT is a potentiometer used to adjust the gain of the F/V
output stage and give the correct meter deflection. The F/V
output voltage is applied to the function generator which
generates the sine and cosine output voltages. The output
voltage of the sine and cosine amplifiers are derived from the
on−chip amplifier and function generator circuitry. The
various trip points for the circuit (i.e., 0°, 90°, 180°, 270°)
are determined by an internal resistor divider and the
bandgap voltage reference. The coils are differentially
driven, allowing bidirectional current flow in the outputs,
thus providing up to 305° range of meter deflection. Driving
the coils differentially offers faster response time, higher
current capability, higher output voltage swings, and
reduced external component count. The key advantage is a
higher torque output for the pointer.
The output angle, q, is equal to the F/V gain multiplied by
the function generator gain:
q + AFńV AFG,
where:
AFG + 77°ńV(typ)
The relationship between input frequency and output
angle is:
q + AFG 2.0 FREQ CCP RT (VREG * 0.7 V)
or,
q + 970 FREQ CCP RT
The ripple voltage at the F/V converter’s output is
determined by the ratio of CCP and C4 in the formula:
DV
+
CCP(VREG
C4
*
0.7
V)
Ripple voltage on the F/V output causes pointer or needle
flutter especially at low input frequencies.
The response time of the F/V is determined by the time
constant formed by RT and C4. Increasing the value of C4
will reduce the ripple on the F/V output but will also increase
the response time. An increase in response time causes a
very slow meter movement and may be unacceptable for
many applications.
Design Example
Maximum meter Deflection = 270°
Maximum Input Frequency = 350 Hz
1. Select RT and CCP
q + 970 FREQ CCP RT + 270°
Let CT = 0.0033 mF, find RT
RT + 970
270°
350 Hz 0.0033 mF
RT + 243 kW
RT should be a 250 kW potentiometer to trim out any
inaccuracies due to IC tolerances or meter movement
pointer placement.
2. Select R3 and R4
Resistor R3 sets the output current from the voltage
regulator. The maximum output current from the voltage
regulator is 10 mA. R3 must ensure that the current does not
exceed this limit.
Choose R3 = 3.3 kW
The charge current for CCP is
VREG * 0.7
3.3 kW
V
+
1.90
mA
CCP must charge and discharge fully during each cycle of
the input signal. Time for one cycle at maximum frequency
is 2.85 ms. To ensure that CCP is charged, assume that the
(R3 + R4) CCP time constant is less than 10% of the
minimum input period.
T + 10%
1
350 Hz
+
285
ms
Choose R4 = 1.0 kW.
Discharge time: tDCHG = R3 × CCP = 3.3 kW × 0.0033 mF
= 10.9 ms
Charge time: tCHG = (R3 + R4)CCP = 4.3 kW. × 0.0033 mF
= 14.2 ms
3. Determine C4
C4 is selected to satisfy both the maximum allowable
ripple voltage and response time of the meter movement.
C4
+
CCP(VREG *
DVMAX
0.7
V)
With C4 = 0.47 mF, the F/V ripple voltage is 44 mV.
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