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PDF CS5165H Data sheet ( Hoja de datos )
| Número de pieza | CS5165H | |
| Descripción | CPU 5-Bit Synchronous Buck Controller | |
| Fabricantes | ON Semiconductor | |
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CS5165H
5−Bit Synchronous CPU
Buck Controller
The CS5165H synchronous 5−bit NFET buck controller is optimized
to manage the power of the next generation Pentium II processors. It’s
V2™ control architecture delivers the fastest transient response (100 ns),
and best overall voltage regulation in the industry today. It’s feature rich
design gives end users the maximum flexibility to implement the best
price/performance solutions for their end products.
The CS5165H has been carefully crafted to maximize performance
and protect the processor during operation. It has a 5−bit DAC on
board that holds a ±1.0% tolerance over temperature. Its on board
programmable Soft Start insures a control start up, and the FET
nonoverlap circuitry ensures that both FETs do not conduct simultaneously.
The on board oscillator can be programmed up to 1.0 MHz to give
the designer maximum flexibility in choosing external components
and setting systems costs.
The CS5165H protects the processor during potentially catastrophic
events like overvoltage (OVP) and short circuit. The OVP feature is
part of the V2 architecture and does not require any additional
components. During short circuit, the controller pulses the MOSFETs
in a “hiccup” mode (3.0% duty cycle) until the fault is removed. With
this method, the MOSFETs do not overheat or self destruct.
The CS5165H is designed for use in both single processor desktop
and multiprocessor workstation and server applications. The IC can be
powered from either single or dual 5.0 V, 12 V power supplies. The
CS5165H’s current sharing capability allows the designer to build multiple
parallel and redundant power solutions for multiprocessor systems.
The CS5165H contains other control and protection features such as
Power Good, ENABLE, and adaptive voltage positioning. It is
available in a 16 lead SOIC wide body package.
Features
• V2 Control Topology
• 100 ns Controller Transient Response
• Excess of 1.0 MHz Operation
• 5−Bit DAC with 1.0% Tolerance
• Power Good Output With Internal Delay
• Enable Input Provides Micropower Shutdown Mode
• 5.0 V & 12 V Operation Using Either Dual or Single Supplies
• Adaptive Voltage Positioning
• Remote Sense Capability
• Current Sharing Capability
• VCC Monitor
• Hiccup Mode Short Circuit Protection
• Overvoltage Protection (OVP)
• Programmable Soft Start
• 150 ns PWM Blanking
• 65 ns FET Nonoverlap Time
• 40 ns Gate Rise and Fall Times (3.3 nF Load)
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 5
1
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16
1
SO−16L
DW SUFFIX
CASE 751G
MARKING
DIAGRAM
16
CS5165H
AWLYYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
1
VID0
VID1
VID2
VID3
SS
VID4
COFF
ENABLE
16
VFB
COMP
LGND
PWRGD
GATE(L)
PGND
GATE(H)
VCC
ORDERING INFORMATION
Device
Package
Shipping
CS5165HGDW16 SO−16L 46 Units/Rail
CS5165HGDWR16 SO−16L 1000 Tape & Reel
Publication Order Number:
CS5165H/D
1 page  
CS5165H
ELECTRICAL CHARACTERISTICS (continued) (0°C < TA < +70°C; 0°C < TJ < +125°C; 8.0 V < VCC < 20 V; 2.8 DAC Code:
(VID4 = VID2 = VID1 = VID0 = 1; VID3 = 0); CGATE(H) and CGATE(L) = 3.3 nF; COFF = 330 pF; CSS = 0.1 μF, unless otherwise specified.)
Characteristic
Test Conditions
Min Typ Max Unit
Voltage Identification DAC
Accuracy (all codes except 11111)
VID4
1
VID3
0
VID2
0
VID1
0
VID0
0
Measure VFB = COMP (COFF = 0 V)
25°C ≤ TJ ≤ 125°C; VCC = 12 V
−
−1.0
−
+1.0
%
3.505
3.540
3.575
V
1 0 001
−
3.406
3.440
3.474
V
1 0 010
−
3.307
3.340
3.373
V
1 0 011
−
3.208
3.240
3.272
V
1 0 100
−
3.109
3.140
3.171
V
1 0 101
−
3.010
3.040
3.070
V
1 0 110
−
2.911
2.940
2.969
V
1 0 111
−
2.812
2.840
2.868
V
1 1 000
−
2.713
2.740
2.767
V
1 1 001
−
2.614
2.640
2.666
V
1 1 010
−
2.515
2.540
2.565
V
1 1 011
−
2.416
2.440
2.464
V
1 1 100
−
2.317
2.340
2.363
V
1 1 101
−
2.218
2.240
2.262
V
1 1 110
−
2.119
2.140
2.161
V
0 0 000
−
2.069
2.090
2.111
V
0 0 001
−
2.020
2.040
2.060
V
0 0 010
−
1.970
1.990
2.010
V
0 0 011
−
1.921
1.940
1.959
V
0 0 100
−
1.871
1.890
1.909
V
0 0 101
−
1.822
1.840
1.858
V
0 0 110
−
1.772
1.790
1.808
V
0 0 111
−
1.723
1.740
1.757
V
0 1 000
−
1.673
1.690
1.707
V
0 1 001
−
1.624
1.640
1.656
V
0 1 010
−
1.574
1.590
1.606
V
0 1 011
−
1.525
1.540
1.555
V
0 1 100
−
1.475
1.490
1.505
V
0 1 101
−
1.426
1.440
1.455
V
0 1 110
−
1.376
1.390
1.405
V
0 1 111
−
1.327
1.340
1.353
V
1 1 111
−
1.223
1.247
1.273
V
Input Threshold
Input Pull−up Resistance
Input Pull−up Voltage
VID4, VID3, VID2, VID1, VID0
VID4, VID3, VID2, VID1, VID0
1.000
25
4.85
1.250
50
5.00
2.400
100
5.15
V
kΩ
V
http://onsemi.com
5
5 Page 
CS5165H
Start Up
Until the voltage on the VCC supply pin exceeds the 3.95 V
monitor threshold, the Soft Start and GATE pins are held
low. The FAULT latch is reset (no Fault condition). The
output of the error amplifier (COMP) is pulled up to 1.0 V by
the comparator clamp. When the VCC pin exceeds the
monitor threshold, the GATE(H) output is activated, and the
Soft Start capacitor begins charging. The GATE(H) output
will remain on, enabling the NFET switch, until terminated
by either the PWM comparator, or the maximum on time
timer.
If the maximum on time is exceeded before the regulator
output voltage achieves the 1.0 V level, the pulse is
terminated. The GATE(H) pin drives low, and the GATE(L)
pin drives high for the duration of the extended off time. This
time is set by the time out timer and is approximately equal
to the maximum on time, resulting in a 50% duty cycle. The
GATE(L) pin will then drive low, the GATE(H) pin will
drive high, and the cycle repeats.
When regulator output voltage achieves the 1.0 V level
present at the COMP pin, regulation has been achieved and
normal off time will ensue. The PWM comparator
terminates the switch on time, with off time set by the COFF
capacitor. The V2 control loop will adjust switch duty cycle
as required to ensure the regulator output voltage tracks the
output of the error amplifier.
The Soft Start and COMP capacitors will charge to their
final levels, providing a controlled turn on of the regulator
output. Regulator turn on time is determined by the COMP
capacitor charging to its final value. Its voltage is limited by
the Soft Start COMP clamp and the voltage on the Soft Start
pin.
Power Supply Sequencing
The CS5165H offers inherent protection from undefined
start up conditions, regardless of the 12 V and 5.0 V supply
power up sequencing. The turn on slew rates of the 12 V and
5.0 V power supplies can be varied over wide ranges without
affecting the output voltage or causing detrimental effects to
the buck regulator.
M 250 μs
Trace 1− Regulator Output Voltage (1.0 V/div.)
Trace 2− Inductor Switching Node (2.0 V/div.)
Trace 3− 12 V Input (VCC) (5.0 V/div.)
Trace 4− 5.0 V Input (1.0 V/div.)
Figure 10. Demonstration Board Startup in Response
to Increasing 12 V and 5.0 V Input Voltages. Extended
Off Time is Followed by Normal Off Time Operation
when Output Voltage Achieves Regulation to the Error
Amplifier Output.
Trace 1− Soft Start Pin (2.0 V/div.)
Trace 2− COMP PIn (error amplifier output) (1.0 V/div.)
Trace 4− Regulator Output Voltage (1.0 V/div.)
Figure 11. Demonstration Board Startup Waveforms
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11
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet CS5165H.PDF ] | |
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