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PDF MB91266A Data sheet ( Hoja de datos )
| Número de pieza | MB91266A | |
| Descripción | (MB91265A Series) 32-bit Proprietary Microcontrollers | |
| Fabricantes | Fujitsu Media Devices | |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-16702-3E
32-bit Proprietary Microcontrollers
CMOS
FR60Lite MB91265A Series
MB91266A/MB91F267A/MB91F267NA/MB91V265A
■ DESCRIPTION
The MB91265A series is a 32-bit RISC microcontroller designed by Fujitsu for embedded control applications
which require high-speed processing.
The CPU is used the FR family* and the compatibility of FR60Lite.
MB91F267NA loads the C-CAN (1 channel) .
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited.
■ FEATURES
• FR60Lite CPU
• 32-bit RISC, load/store architecture with a five-stage pipeline
• Maximum operating frequency : 33 MHz (oscillation frequency 4.192 MHz, oscillation frequency 8-multiplier
(PLL clock multiplication method)
• 16-bit fixed length instructions (basic instructions)
• Execution speed of instructions : 1 instruction per cycle
• Memory-to-memory transfer, bit handling, barrel shift instructions, etc. : Instructions suitable for embedded
applications
• Function entry/exit instructions, multiple-register load/store instructions : Instructions adapted for C-language
• Register interlock function : Facilitates coding in assembler.
• Built-in multiplier with instruction-level support
• 32-bit multiplication with sign : 5 cycles
• 16-bit multiplication with sign : 3 cycles
• Interrupt (PC, PS save) : 6 cycles, 16 priority levels
• Harvard architecture allowing program access and data access to be executed simultaneously
• Instruction compatible with FR family
(Continued)
Be sure to refer to the “Check Sheet” for the latest cautions on development.
“Check Sheet” is seen at the following support page
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system
development.
Copyright©2005-2007 FUJITSU LIMITED All rights reserved
1 page  
MB91265A Series
Pin no.
Pin
name
I/O
Circuit
type*1
Description
Analog input terminal of A/D converter 2.
AN10
This function becomes valid when set the corresponding AICR2 register to analog
13 G input.
P46
General purpose input/output port.
This function becomes valid when analog input is set to disabled.
14 NMI H NMI (Non Maskable Interrupt) input terminal.
INT4
External interrupt input terminal.
Since this input is used as required while the corresponding external interrupt is
enabled, the port output must remain off unless intentionally used.
18
PPG1
E
Output terminal of PPG timer 1.
This function becomes valid when output of PPG timer 1 is set to enabled.
General purpose input/output port.
P00 This function becomes valid when output of PPG timer 1 and external interrupt input
are set to disabled.
PPG2
Output terminal of PPG timer 2.
This function becomes valid when output of PPG timer 2 is set to enabled.
19 D
P01
General purpose input/output port.
This function becomes valid when output of PPG timer 2 is set to disabled.
INT5
External interrupt input terminal.
Since this input is used as required while the corresponding external interrupt is
enabled, the port output must remain off unless intentionally used.
20
PPG3
E
Output terminal of PPG timer 3.
This function becomes valid when output of PPG timer 3 is set to enabled.
General purpose input/output port.
P02 This function becomes valid when output of PPG timer 3 and external interrupt input
are set to disabled.
External trigger input terminal of reload timer 0.
TIN0
Since this input is used as required while the trigger input is enabled, the port output
must remain off unless intentionally used.
21 D
General purpose input/output port.
P03 This function becomes valid when external clock input of reload timer 0 is set to
disabled.
External trigger input terminal of reload timer 1.
TIN1
Since this input is used as required while the trigger input is enabled, the port output
must remain off unless intentionally used.
22 D
General purpose input/output port.
P04 This function becomes valid when external clock input of reload timer 1 is set to
disabled.
External trigger input terminal of reload timer 2.
TIN2
Since this input is used as required while the trigger input is enabled, the port output
must remain off unless intentionally used.
23 D
General purpose input/output port.
P05 This function becomes valid when external clock input of reload timer 2 is set to
disabled.
(Continued)
5
5 Page 
MB91265A Series
■ I/O CIRCUIT TYPE
Type
X1
Circuit type
Clock input
Remarks
Oscillation feedback resistance
for high speed (main clock oscillation) :
approx. 1 MΩ
A X0
Standby control
Pull-up control
P-ch
P-ch
Digital output
D Digital output
N-ch
Standby control
Digital input
Pull-up control
Digital output
P-ch
P-ch
E
Digital output
N-ch
Digital input
• CMOS level output
• CMOS level hysteresis input
• With standby control
• With Pull-up control
• IOL = 4 mA
• CMOS level output
• CMOS level hysteresis input
• Without standby control
• With Pull-up control
• IOL = 4 mA
(Continued)
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB91266A.PDF ] | |
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