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EMA6DXV5T5 데이터시트 PDF




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부품번호 EMA6DXV5T5 기능
기능 (EMA6DXV5T1 / EMA6DXV5T5) Dual Common Emitter Bias Resistor Transistor PNP Silicon Surface Mount Transistors
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EMA6DXV5T5 데이터시트, 핀배열, 회로
www.DataSheet4U.com
EMA6DXV5T1,
EMA6DXV5T5
Preferred Devices
Dual Common Emitter Bias
Resistor Transistor
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base−emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the
SOT−553 package which is designed for low power surface mount
applications.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Moisture Sensitivity Level: 1
ESD Rating − Human Body Model: Class 1
− Machine Model: Class B
Available in 7 Inch Tape and Reel
Lead−Free Solder Plating
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
VCBO
VCEO
IC
50
50
100
Characteristic
Symbol
Max
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD 230 (Note 1)
338 (Note 2)
1.8 (Note 1)
2.7 (Note 2)
Thermal Resistance −
Junction-to-Ambient
RqJA
540 (Note 1)
370 (Note 2)
Thermal Resistance −
Junction-to-Lead
RqJL
264 (Note 1)
287 (Note 2)
Junction and Storage
Temperature Range
TJ, Tstg − 55 to +150
DEVICE MARKING AND RESISTOR VALUES
Device
Marking
R1 (K)
EMA6DXV5T1
UD 47
1. FR−4 @ Minimum Pad
2. FR−4 @ 1.0 x 1.0 inch Pad
Unit
Vdc
Vdc
mAdc
Unit
mW
°C/W
°C/W
°C/W
°C
R2 (K)
http://onsemi.com
PNP SILICON
BIAS RESISTOR
TRANSISTOR
EMA6 / UMA6N
(3) (2) (1)
R2 R1
(4) (5) / (6)
5
1
SOT−553
CASE 463B
MARKING DIAGRAM
5
UD M
1
UD= Specific Device Code
M = Date Code
ORDERING INFORMATION
Device
Package
Shipping
EMA6DXV5T1
SOT−553 4 mm pitch
4000/Tape & Reel
EMA6DXV5T5
SOT−553 2 mm pitch
8000/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2003
September, 2003 − Rev. 0
1
Publication Order Number:
EMA6DXV5T1/D




EMA6DXV5T5 pdf, 반도체, 판매, 대치품
EMA6DXV5T1, EMA6DXV5T5
PACKAGE DIMENSIONS
SOT−553
XV5 SUFFIX
5−LEAD PACKAGE
CASE 463B−01
ISSUE O
A
−X− C
54
12 3
B
−Y−
D 5 PL
G 0.08 (0.003) M X Y
K
S
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 1.50 1.70 0.059 0.067
B 1.10 1.30 0.043 0.051
C 0.50 0.60 0.020 0.024
D 0.17 0.27 0.007 0.011
G 0.50 BSC
0.020 BSC
J 0.08 0.18 0.003 0.007
K 0.10 0.30 0.004 0.012
S 1.50 1.70 0.059 0.067
Thermal Clad is a trademark of the Bergquist Company.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
N. American Technical Support: 800−282−9855 Toll Free
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Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
4
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
EMA6DXV5T1/D

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